[PATCH] drm/amd/display: Reject overlay plane configurations in multi-display scenarios

Wu, Hersen hersenxs.wu at amd.com
Wed Aug 19 18:06:06 UTC 2020


[AMD Official Use Only - Internal Distribution Only]


Reviewed-by: Hersen Wu <hersenxs.wu at amd.com>



-----Original Message-----
From: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com> 
Sent: Wednesday, August 19, 2020 1:56 PM
To: amd-gfx at lists.freedesktop.org
Cc: Kazlauskas, Nicholas <Nicholas.Kazlauskas at amd.com>; Wu, Hersen <hersenxs.wu at amd.com>
Subject: [PATCH] drm/amd/display: Reject overlay plane configurations in multi-display scenarios

[Why]
These aren't stable on some platform configurations when driving multiple displays, especially on higher resolution.

In particular the delay in asserting p-state and validating from
x86 outweights any power or performance benefit from the hardware composition.

Under some configurations this will manifest itself as extreme stutter or unresponsiveness especially when combined with cursor movement.

[How]
Disable these for now. Exposing overlays to userspace doesn't guarantee that they'll be able to use them in any and all configurations and it's part of the DRM contract to have userspace gracefully handle validation failures when they occur.

Valdiation occurs as part of DC and this in particular affects RV, so disable this in dcn10_global_validation.

Cc: Hersen Wu <hersenxs.wu at amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 07571f84e0f8..1abd81e17f09 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -1213,6 +1213,7 @@ static enum dc_status dcn10_validate_global(struct dc *dc, struct dc_state *cont
 	bool video_large = false;
 	bool desktop_large = false;
 	bool dcc_disabled = false;
+	bool mpo_enabled = false;
 
 	for (i = 0; i < context->stream_count; i++) {
 		if (context->stream_status[i].plane_count == 0) @@ -1221,6 +1222,9 @@ static enum dc_status dcn10_validate_global(struct dc *dc, struct dc_state *cont
 		if (context->stream_status[i].plane_count > 2)
 			return DC_FAIL_UNSUPPORTED_1;
 
+		if (context->stream_status[i].plane_count > 1)
+			mpo_enabled = true;
+
 		for (j = 0; j < context->stream_status[i].plane_count; j++) {
 			struct dc_plane_state *plane =
 				context->stream_status[i].plane_states[j];
@@ -1244,6 +1248,10 @@ static enum dc_status dcn10_validate_global(struct dc *dc, struct dc_state *cont
 		}
 	}
 
+	/* Disable MPO in multi-display configurations. */
+	if (context->stream_count > 1 && mpo_enabled)
+		return DC_FAIL_UNSUPPORTED_1;
+
 	/*
 	 * Workaround: On DCN10 there is UMC issue that causes underflow when
 	 * playing 4k video on 4k desktop with video downscaled and single channel
--
2.25.1


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