[PATCH 4/8] amdgpu: limit maximum BAR0 size when attempting to enlarge (v3)

[Darren Salt]

This is coarse, applying to all dGPUs.

[v3] On -ENOSPC, include the size attempted in the logged error.

[v2] If there are no advertised sizes small enough, limit to the smallest
available.
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 32 ++++++++++++++++++----
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  9 ++++++
 3 files changed, 37 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index c228e7470d51..0b17e758e3f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -201,6 +201,7 @@ static const bool __maybe_unused no_system_mem_limit;
 
 extern int amdgpu_tmz;
 extern int amdgpu_reset_method;
+extern int amdgpu_max_bar_size;
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index ac94f8db06a8..fde5aaf97dc6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1107,6 +1107,7 @@ void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb)
 int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
 {
 	int rbar_size, current_size;
+	int max_size = -1;
 	u64 current_bytes;
 	u32 available_sizes;
 	struct pci_bus *root;
@@ -1121,13 +1122,20 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
 
 	current_bytes = pci_resource_len(adev->pdev, 0);
 
-	/* Skip if the BIOS has already enabled large BAR, covering the VRAM */
-	if (current_bytes >= adev->gmc.real_vram_size)
-		return 0;
-
 	current_size = current_bytes ? pci_rebar_bytes_to_size(current_bytes) : -1;
 	rbar_size = pci_rebar_bytes_to_size(adev->gmc.real_vram_size);
 
+	/* If a maximum size is set, skip if that is the current size */
+	if (amdgpu_max_bar_size >= 0) {
+		max_size = max(amdgpu_max_bar_size, 8); /* clamp to min. 256MB */
+		if (current_size == max_size)
+			return 0;
+		rbar_size = max_size;
+	}
+	/* Else skip if the BAR already covers the VRAM */
+	else if (current_bytes >= adev->gmc.real_vram_size)
+		return 0;
+
 	/* Check if the root BUS has 64bit memory resources */
 	root = adev->pdev->bus;
 	while (root->parent)
@@ -1144,6 +1152,19 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
 		return 0;
 
 	available_sizes = pci_rebar_get_possible_sizes(adev->pdev, 0);
+	if (max_size >= 0) {
+		/* Cause larger sizes to be ignored unless that would leave
+		 * no advertised sizes (which shouldn't happen).
+		 */
+		r = available_sizes & ~(-1 << (max_size + 1));
+		if (!r) {
+			/* No smaller sizes, so use the smallest advertised */
+			r = ffs(r);
+			if (r)
+				r = 1 << (r - 1);
+		}
+		available_sizes = r;
+	}
 	if (available_sizes == 0)
 		return 0;
 
@@ -1171,7 +1192,8 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
 	if (r == -ENOTSUPP) {
 		dev_info(adev->dev, "BAR resizing not supported.");
 	} else if (r == -ENOSPC) {
-		dev_info(adev->dev, "Not enough PCI address space for a large BAR.");
+		dev_info(adev->dev, "Not enough PCI address space for a %lldMB BAR.",
+		         pci_rebar_size_to_bytes(rbar_size) >> 20);
 	} else if (r) {
 		dev_err(adev->dev, "Problem resizing BAR0 (%d).", r);
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index cac2724e7615..dd2dc992ed13 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -161,6 +161,7 @@ int amdgpu_force_asic_type = -1;
 int amdgpu_tmz;
 int amdgpu_reset_method = -1; /* auto */
 int amdgpu_num_kcq = -1;
+int amdgpu_max_bar_size = -1;
 
 struct amdgpu_mgpu_info mgpu_info = {
 	.mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),
@@ -807,6 +808,14 @@ module_param_named(bad_page_threshold, amdgpu_bad_page_threshold, int, 0444);
 MODULE_PARM_DESC(num_kcq, "number of kernel compute queue user want to setup (8 if set to greater than 8 or less than 0, only affect gfx 8+)");
 module_param_named(num_kcq, amdgpu_num_kcq, int, 0444);
 
+/**
+ * DOC: max_bar_size (int)
+ * The maximum BAR size, in megabytes. Only affects BARs which the BIOS hasn't already made larger.
+ * Unlimited by default.
+ */
+module_param_named(max_bar_size, amdgpu_max_bar_size, int, 0444);
+MODULE_PARM_DESC(max_bar_size, "Maximum FB BAR size, log2(megabytes) (default = -1, meaning unlimited; minimum is 8 for 256MB).");
+
 static const struct pci_device_id pciidlist[] = {
 #ifdef  CONFIG_DRM_AMDGPU_SI
 	{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
-- 
2.20.1