[PATCH 2/2] drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency

[Alex Deucher]

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On Tue, Jan 28, 2020 at 2:47 PM Alex Deucher <alexdeucher at gmail.com> wrote:
>
> Only send non-0 clocks to DC for validation.  This mirrors
> what the windows driver does.
>
> Bug: https://gitlab.freedesktop.org/drm/amd/issues/963
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> index 4e8ab139bb3b..273126cfc37d 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> @@ -1026,12 +1026,15 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
>
>         clocks->num_levels = 0;
>         for (i = 0; i < pclk_vol_table->count; i++) {
> -               clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10;
> -               clocks->data[i].latency_in_us = latency_required ?
> -                                               smu10_get_mem_latency(hwmgr,
> -                                               pclk_vol_table->entries[i].clk) :
> -                                               0;
> -               clocks->num_levels++;
> +               if (pclk_vol_table->entries[i].clk) {
> +                       clocks->data[clocks->num_levels].clocks_in_khz =
> +                               pclk_vol_table->entries[i].clk * 10;
> +                       clocks->data[clocks->num_levels].latency_in_us = latency_required ?
> +                               smu10_get_mem_latency(hwmgr,
> +                                                     pclk_vol_table->entries[i].clk) :
> +                               0;
> +                       clocks->num_levels++;
> +               }
>         }
>
>         return 0;
> --
> 2.24.1
>