[PATCH] drm/amdgpu/vcn2.5: fix DPG mode power off issue on instance 1

[Leo Liu]

On 2020-02-05 9:45 a.m., James Zhu wrote:
> Support pause_state for multiple instance, and it will fix vcn2.5 DPG mode
> power off issue on instance 1.
>
> Signed-off-by: James Zhu <James.Zhu at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h |  3 +--
>   drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c   | 14 ++++++++------
>   drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c   |  6 +++---
>   drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c   |  6 +++---
>   4 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index d6deb0e..fb3dfe3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -179,6 +179,7 @@ struct amdgpu_vcn_inst {
>   	struct amdgpu_irq_src	irq;
>   	struct amdgpu_vcn_reg	external;
>   	struct amdgpu_bo	*dpg_sram_bo;
> +	struct dpg_pause_state pause_state;

Can this variable be aligned with other variables in the structure? With 
that fixed, the patch is

Reviewed-by: Leo Liu <leo.liu at amd.com>


>   	void			*dpg_sram_cpu_addr;
>   	uint64_t		dpg_sram_gpu_addr;
>   	uint32_t		*dpg_sram_curr_addr;
> @@ -190,8 +191,6 @@ struct amdgpu_vcn {
>   	const struct firmware	*fw;	/* VCN firmware */
>   	unsigned		num_enc_rings;
>   	enum amd_powergating_state cur_state;
> -	struct dpg_pause_state pause_state;
> -
>   	bool			indirect_sram;
>   
>   	uint8_t	num_vcn_inst;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index 1a24fad..71f61af 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -1207,9 +1207,10 @@ static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
>   	struct amdgpu_ring *ring;
>   
>   	/* pause/unpause if state is changed */
> -	if (adev->vcn.pause_state.fw_based != new_state->fw_based) {
> +	if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
>   		DRM_DEBUG("dpg pause state changed %d:%d -> %d:%d",
> -			adev->vcn.pause_state.fw_based, adev->vcn.pause_state.jpeg,
> +			adev->vcn.inst[inst_idx].pause_state.fw_based,
> +			adev->vcn.inst[inst_idx].pause_state.jpeg,
>   			new_state->fw_based, new_state->jpeg);
>   
>   		reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &
> @@ -1258,13 +1259,14 @@ static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
>   			reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
>   			WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
>   		}
> -		adev->vcn.pause_state.fw_based = new_state->fw_based;
> +		adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
>   	}
>   
>   	/* pause/unpause if state is changed */
> -	if (adev->vcn.pause_state.jpeg != new_state->jpeg) {
> +	if (adev->vcn.inst[inst_idx].pause_state.jpeg != new_state->jpeg) {
>   		DRM_DEBUG("dpg pause state changed %d:%d -> %d:%d",
> -			adev->vcn.pause_state.fw_based, adev->vcn.pause_state.jpeg,
> +			adev->vcn.inst[inst_idx].pause_state.fw_based,
> +			adev->vcn.inst[inst_idx].pause_state.jpeg,
>   			new_state->fw_based, new_state->jpeg);
>   
>   		reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &
> @@ -1318,7 +1320,7 @@ static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
>   			reg_data &= ~UVD_DPG_PAUSE__JPEG_PAUSE_DPG_REQ_MASK;
>   			WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
>   		}
> -		adev->vcn.pause_state.jpeg = new_state->jpeg;
> +		adev->vcn.inst[inst_idx].pause_state.jpeg = new_state->jpeg;
>   	}
>   
>   	return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index 4f72167..c387c81 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -1137,9 +1137,9 @@ static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
>   	int ret_code;
>   
>   	/* pause/unpause if state is changed */
> -	if (adev->vcn.pause_state.fw_based != new_state->fw_based) {
> +	if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
>   		DRM_DEBUG("dpg pause state changed %d -> %d",
> -			adev->vcn.pause_state.fw_based,	new_state->fw_based);
> +			adev->vcn.inst[inst_idx].pause_state.fw_based,	new_state->fw_based);
>   		reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &
>   			(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);
>   
> @@ -1185,7 +1185,7 @@ static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
>   			reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
>   			WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
>   		}
> -		adev->vcn.pause_state.fw_based = new_state->fw_based;
> +		adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
>   	}
>   
>   	return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> index 70fae79..97ab44c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> @@ -1367,9 +1367,9 @@ static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
>   	int ret_code;
>   
>   	/* pause/unpause if state is changed */
> -	if (adev->vcn.pause_state.fw_based != new_state->fw_based) {
> +	if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
>   		DRM_DEBUG("dpg pause state changed %d -> %d",
> -			adev->vcn.pause_state.fw_based,	new_state->fw_based);
> +			adev->vcn.inst[inst_idx].pause_state.fw_based,	new_state->fw_based);
>   		reg_data = RREG32_SOC15(UVD, inst_idx, mmUVD_DPG_PAUSE) &
>   			(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);
>   
> @@ -1414,7 +1414,7 @@ static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
>   			reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
>   			WREG32_SOC15(UVD, inst_idx, mmUVD_DPG_PAUSE, reg_data);
>   		}
> -		adev->vcn.pause_state.fw_based = new_state->fw_based;
> +		adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
>   	}
>   
>   	return 0;