[PATCH 2/4] drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access
Felix Kuehling
felix.kuehling at amd.com
Thu Feb 6 02:40:17 UTC 2020
If we're using the BAR, we should probably flush HDP cache/buffers
before reading or after writing.
Regards,
Felix
On 2020-02-05 10:22 a.m., Christian König wrote:
> This should speed up debugging VRAM access a lot.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index d39630edda01..7d65c9aedecd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -188,6 +188,27 @@ void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
> uint32_t hi = ~0;
> uint64_t last;
>
> +
> +#ifdef CONFIG_64BIT
> + last = min(pos + size, adev->gmc.visible_vram_size);
> + if (last > pos) {
> + void __iomem *addr = adev->mman.aper_base_kaddr + pos;
> + size_t count = last - pos;
> +
> + if (write)
> + memcpy_toio(addr, buf, count);
> + else
> + memcpy_fromio(buf, addr, count);
> +
> + if (count == size)
> + return;
> +
> + pos += count;
> + buf += count / 4;
> + size -= count;
> + }
> +#endif
> +
> spin_lock_irqsave(&adev->mmio_idx_lock, flags);
> for (last = pos + size; pos < last; pos += 4) {
> uint32_t tmp = pos >> 31;
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