[PATCH umr] fix field names for INDIRECT_BUFFER_CONST/CIK for gfx9/gfx10

Tom St Denis tom.stdenis at amd.com
Wed Feb 19 11:51:05 UTC 2020


Yup, my bad.  We also need to fix the streaming version (line 432 of 
src/lib/umr_pm4_decode_opcodes.c).  Would you like to incorporate this 
into this patch?  Otherwise I can do it separately.

Thanks,

Tom

On 2020-02-19 6:26 a.m., Xiaojie Yuan wrote:
> field names for INDIRECT_BUFFER_CONST/CIK of gfx9/gfx10 are the same.
> fields like OFFLOAD_POLLING and VALID are defined in mec's
> INDIRECT_BUFFER packet, so not applicable here.
>
> Signed-off-by: Xiaojie Yuan <xiaojie.yuan at amd.com>
> ---
>   src/lib/ring_decode.c | 23 +++++++----------------
>   1 file changed, 7 insertions(+), 16 deletions(-)
>
> diff --git a/src/lib/ring_decode.c b/src/lib/ring_decode.c
> index 250dfd7..fa44f27 100644
> --- a/src/lib/ring_decode.c
> +++ b/src/lib/ring_decode.c
> @@ -617,22 +617,13 @@ static void print_decode_pm4_pkt3(struct umr_asic *asic, struct umr_ring_decoder
>   				case 2: printf("IB_SIZE:%s%lu%s, VMID: %s%lu%s", BLUE, BITS(ib, 0, 20), RST, BLUE, BITS(ib, 24, 28), RST);
>   					decoder->pm4.next_ib_state.ib_size = BITS(ib, 0, 20) * 4;
>   					decoder->pm4.next_ib_state.ib_vmid = decoder->next_ib_info.vmid ? decoder->next_ib_info.vmid : BITS(ib, 24, 28);
> -					if (decoder->pm4.cur_opcode == 0x33) {
> -						if (asic->family >= FAMILY_NV) {
> -							printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
> -								   BLUE, (unsigned)BITS(ib, 20, 21), RST,
> -								   BLUE, (unsigned)BITS(ib, 21, 22), RST,
> -								   BLUE, (unsigned)BITS(ib, 28, 30), RST,
> -								   BLUE, (unsigned)BITS(ib, 30, 31), RST,
> -								   BLUE, (unsigned)BITS(ib, 31, 32), RST);
> -						} else if (asic->family >= FAMILY_AI) {
> -							printf(", CHAIN: %s%u%s, OFFLOAD_POLLING: %s%u%s, VALID: %s%u%s, CACHE_POLICY: %s%u%s PRIV: %s%u%s",
> -								   BLUE, (unsigned)BITS(ib, 20, 21), RST,
> -								   BLUE, (unsigned)BITS(ib, 21, 22), RST,
> -								   BLUE, (unsigned)BITS(ib, 23, 24), RST,
> -								   BLUE, (unsigned)BITS(ib, 28, 30), RST,
> -								   BLUE, (unsigned)BITS(ib, 31, 32), RST);
> -						}
> +					if (asic->family >= FAMILY_AI) {
> +						printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
> +							   BLUE, (unsigned)BITS(ib, 20, 21), RST,
> +							   BLUE, (unsigned)BITS(ib, 21, 22), RST,
> +							   BLUE, (unsigned)BITS(ib, 28, 30), RST,
> +							   BLUE, (unsigned)BITS(ib, 30, 31), RST,
> +							   BLUE, (unsigned)BITS(ib, 31, 32), RST);
>   					}
>   					if (!asic->options.no_follow_ib) {
>   						if (umr_read_vram(asic, decoder->pm4.next_ib_state.ib_vmid,


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