[RFC PATCH 3/4] drm/amdgpu: change hw sched list on ctx priority override
Nirmoy Das
nirmoy.aiemd at gmail.com
Thu Feb 27 21:40:11 UTC 2020
Switch to appropriate sched list for an entity on priority override.
Signed-off-by: Nirmoy Das <nirmoy.das at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 54 ++++++++++++++++++++++++-
1 file changed, 53 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index a1742b1d4f9c..69a791430b25 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -508,11 +508,53 @@ struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
return fence;
}
+static int amdgpu_ctx_change_sched(struct amdgpu_ctx *ctx,
+ struct amdgpu_ctx_entity *aentity,
+ int hw_ip, enum drm_sched_priority priority)
+{
+ struct amdgpu_device *adev = ctx->adev;
+ struct drm_gpu_scheduler **scheds = NULL;
+ unsigned num_scheds = 0;
+
+ switch (hw_ip) {
+ case AMDGPU_HW_IP_COMPUTE:
+ if (priority > DRM_SCHED_PRIORITY_NORMAL &&
+ adev->gfx.num_compute_sched_high) {
+ scheds = adev->gfx.compute_sched_high;
+ num_scheds = adev->gfx.num_compute_sched_high;
+ } else {
+ scheds = adev->gfx.compute_sched;
+ num_scheds = adev->gfx.num_compute_sched;
+ }
+ break;
+ default:
+ return 0;
+ }
+
+ return drm_sched_entity_modify_sched(&aentity->entity, scheds, num_scheds);
+}
+
+static int amdgpu_ctx_hw_priority_override(struct amdgpu_ctx *ctx,
+ const u32 hw_ip,
+ enum drm_sched_priority priority)
+{
+ int r = 0, i;
+
+ for (i = 0; i < amdgpu_ctx_num_entities[hw_ip]; ++i) {
+ if (!ctx->entities[hw_ip][i])
+ continue;
+ r = amdgpu_ctx_change_sched(ctx, ctx->entities[hw_ip][i],
+ hw_ip, priority);
+ }
+
+ return r;
+}
+
void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
enum drm_sched_priority priority)
{
enum drm_sched_priority ctx_prio;
- unsigned i, j;
+ unsigned r, i, j;
ctx->override_priority = priority;
@@ -521,11 +563,21 @@ void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
for (i = 0; i < AMDGPU_HW_IP_NUM; ++i) {
for (j = 0; j < amdgpu_ctx_num_entities[i]; ++j) {
struct drm_sched_entity *entity;
+ struct amdgpu_ring *ring;
if (!ctx->entities[i][j])
continue;
entity = &ctx->entities[i][j]->entity;
+ ring = to_amdgpu_ring(entity->rq->sched);
+
+ if (ring->high_priority) {
+ r = amdgpu_ctx_hw_priority_override(ctx, i,
+ ctx_prio);
+ if (r)
+ DRM_ERROR("Failed to override HW priority for %s",
+ ring->name);
+ }
drm_sched_entity_set_priority(entity, ctx_prio);
}
}
--
2.25.0
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