[PATCH 1/2] drm/amdgpu/gmc: move invaliation bitmap setup to common code
Christian König
ckoenig.leichtzumerken at gmail.com
Mon Jan 6 20:21:13 UTC 2020
Am 06.01.20 um 20:16 schrieb Felix Kuehling:
> On 2020-01-06 1:35 p.m., Alex Deucher wrote:
>> So it can be shared with newer GMC versions.
>>
>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>
> Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
>
>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 40 +++++++++++++++++++++++++
>> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 1 +
>> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 32 +-------------------
>> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h | 10 -------
>> 4 files changed, 42 insertions(+), 41 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
>> index bbcd11ac5bbb..d6901b274790 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
>> @@ -333,3 +333,43 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device
>> *adev)
>> amdgpu_mmhub_ras_fini(adev);
>> amdgpu_xgmi_ras_fini(adev);
>> }
>> +
>> + /*
>> + * The latest engine allocation on gfx9 is:
>> + * Engine 2, 3: firmware
>> + * Engine 0, 1, 4~16: amdgpu ring,
>> + * subject to change when ring number changes
>> + * Engine 17: Gart flushes
>> + */
>> +#define GFXHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
>> +#define MMHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
>> +
>> +int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev)
>> +{
>> + struct amdgpu_ring *ring;
>> + unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] =
>> + {GFXHUB_FREE_VM_INV_ENGS_BITMAP, MMHUB_FREE_VM_INV_ENGS_BITMAP,
>> + GFXHUB_FREE_VM_INV_ENGS_BITMAP};
>> + unsigned i;
>> + unsigned vmhub, inv_eng;
>> +
>> + for (i = 0; i < adev->num_rings; ++i) {
>> + ring = adev->rings[i];
>> + vmhub = ring->funcs->vmhub;
>> +
>> + inv_eng = ffs(vm_inv_engs[vmhub]);
>> + if (!inv_eng) {
>> + dev_err(adev->dev, "no VM inv eng for ring %s\n",
>> + ring->name);
>> + return -EINVAL;
>> + }
>> +
>> + ring->vm_inv_eng = inv_eng - 1;
>> + vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);
>> +
>> + dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",
>> + ring->name, ring->vm_inv_eng, ring->funcs->vmhub);
>> + }
>> +
>> + return 0;
>> +}
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
>> index b499a3de8bb6..c91dd602d5f1 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
>> @@ -267,5 +267,6 @@ bool amdgpu_gmc_filter_faults(struct
>> amdgpu_device *adev, uint64_t addr,
>> uint16_t pasid, uint64_t timestamp);
>> int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev);
>> void amdgpu_gmc_ras_fini(struct amdgpu_device *adev);
>> +int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev);
>> #endif
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index 68f9a1fa6dc1..e3bbeab28152 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -795,36 +795,6 @@ static bool gmc_v9_0_keep_stolen_memory(struct
>> amdgpu_device *adev)
>> }
>> }
>> -static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev)
>> -{
>> - struct amdgpu_ring *ring;
>> - unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] =
>> - {GFXHUB_FREE_VM_INV_ENGS_BITMAP, MMHUB_FREE_VM_INV_ENGS_BITMAP,
>> - GFXHUB_FREE_VM_INV_ENGS_BITMAP};
>> - unsigned i;
>> - unsigned vmhub, inv_eng;
>> -
>> - for (i = 0; i < adev->num_rings; ++i) {
>> - ring = adev->rings[i];
>> - vmhub = ring->funcs->vmhub;
>> -
>> - inv_eng = ffs(vm_inv_engs[vmhub]);
>> - if (!inv_eng) {
>> - dev_err(adev->dev, "no VM inv eng for ring %s\n",
>> - ring->name);
>> - return -EINVAL;
>> - }
>> -
>> - ring->vm_inv_eng = inv_eng - 1;
>> - vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);
>> -
>> - dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",
>> - ring->name, ring->vm_inv_eng, ring->funcs->vmhub);
>> - }
>> -
>> - return 0;
>> -}
>> -
>> static int gmc_v9_0_late_init(void *handle)
>> {
>> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>> @@ -833,7 +803,7 @@ static int gmc_v9_0_late_init(void *handle)
>> if (!gmc_v9_0_keep_stolen_memory(adev))
>> amdgpu_bo_late_init(adev);
>> - r = gmc_v9_0_allocate_vm_inv_eng(adev);
>> + r = amdgpu_gmc_allocate_vm_inv_eng(adev);
>> if (r)
>> return r;
>> /* Check if ecc is available */
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
>> index 49e8be761214..e0585e8c6c1b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
>> @@ -24,16 +24,6 @@
>> #ifndef __GMC_V9_0_H__
>> #define __GMC_V9_0_H__
>> - /*
>> - * The latest engine allocation on gfx9 is:
>> - * Engine 2, 3: firmware
>> - * Engine 0, 1, 4~16: amdgpu ring,
>> - * subject to change when ring number changes
>> - * Engine 17: Gart flushes
>> - */
>> -#define GFXHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
>> -#define MMHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
>> -
>> extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
>> extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
>> #endif
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