[PATCH] drm/amdgpu: updated UMC error address record with correct channel index

[Clements, John]

[AMD Official Use Only - Internal Distribution Only]

Thanks Tao, I've updated the patch with this change and followed up in the other thread.

Thank you,
John Clements

From: Zhou1, Tao <Tao.Zhou1 at amd.com>
Sent: Tuesday, January 7, 2020 4:22 PM
To: Clements, John <John.Clements at amd.com>; amd-gfx at lists.freedesktop.org; dl.srdc_lnx_ras <dl.srdc_lnx_ras at amd.com>
Subject: Re: [PATCH] drm/amdgpu: updated UMC error address record with correct channel index

I prefer to calc channel_index like this:

channel_index =
    adev->umc.channel_idx_tbl[umc_inst * adapt->umc.channel_inst_num + ch_inst];

idx_tbl is ASIC specific, using adev->umc.channel_idx_tbl instead can avoid adding "if (adev->asic_type == xxx)" in the future.

Regards,
Tao
________________________________
From: Clements, John <John.Clements at amd.com<mailto:John.Clements at amd.com>>
Sent: Tuesday, January 7, 2020 3:28 PM
To: amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org> <amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>>; dl.srdc_lnx_ras <dl.srdc_lnx_ras at amd.com<mailto:dl.srdc_lnx_ras at amd.com>>
Subject: [PATCH] drm/amdgpu: updated UMC error address record with correct channel index


[AMD Official Use Only - Internal Distribution Only]


Resolved issue with inputting an incorrect UMC channel index into the UMC error address record.



Defined macros for repetitive for loops



Thank you,

John Clements
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