[PATCH 1/2] drm/amdgpu: enable S/G display on PCO and RV2

[Christian König]

Am 07.01.20 um 22:13 schrieb Alex Deucher:
> It should work on all Raven variants, but some users have
> reported issues with original Raven with IOMMU enabled.
> So far there have been no issues observed with PCO or RV2.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 22 ++++++++++++++-----
>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 ++++++++++-----
>   2 files changed, 28 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 4e699071d144..6d520a3eec40 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -513,13 +513,23 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
>   	 * will not allow USWC mappings.
>   	 * Also, don't allow GTT domain if the BO doens't have USWC falg set.
>   	 */
> -	if (adev->asic_type >= CHIP_CARRIZO &&
> -	    adev->asic_type < CHIP_RAVEN &&
> -	    (adev->flags & AMD_IS_APU) &&
> -	    (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
> +	if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
>   	    amdgpu_bo_support_uswc(bo_flags) &&
> -	    amdgpu_device_asic_has_dc_support(adev->asic_type))
> -		domain |= AMDGPU_GEM_DOMAIN_GTT;
> +	    amdgpu_device_asic_has_dc_support(adev->asic_type)) {
> +		switch (adev->asic_type) {
> +		case CHIP_CARRIZO:
> +		case CHIP_STONEY:
> +			domain |= AMDGPU_GEM_DOMAIN_GTT;
> +			break;
> +		case CHIP_RAVEN:
> +			/* enable S/G on PCO and RV2 */
> +			if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
> +				domain |= AMDGPU_GEM_DOMAIN_GTT;
> +			break;
> +		default:
> +			break;
> +		}
> +	}
>   #endif
>   
>   	return domain;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index b998b0382477..05118c8860f9 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -906,13 +906,19 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>   
>   	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>   
> -	/*
> -	 * TODO debug why this doesn't work on Raven
> -	 */
> -	if (adev->flags & AMD_IS_APU &&
> -	    adev->asic_type >= CHIP_CARRIZO &&
> -	    adev->asic_type < CHIP_RAVEN)
> +	switch (adev->asic_type) {
> +	case CHIP_CARRIZO:
> +	case CHIP_STONEY:
>   		init_data.flags.gpu_vm_support = true;
> +		break;
> +	case CHIP_RAVEN:
> +		/* enable S/G on PCO and RV2 */
> +		if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
> +			init_data.flags.gpu_vm_support = true;
> +		break;
> +	default:
> +		break;
> +	}

It might be a good idea to enable gpu_vm_support independent anyway.

Might be even a good idea to do this in a separate patch.

But either way I'm not an expert on how the hardware works in this area, 
so Acked-by: Christian König <christian.koenig at amd.com> for this series 
either way.

Regards,
Christian.

>   
>   	if (amdgpu_dc_feature_mask & DC_FBC_MASK)
>   		init_data.flags.fbc_support = true;