[PATCH] drm/amdgpu/display: protect new DSC code with CONFIG_DRM_AMD_DC_DCN
Harry Wentland
hwentlan at amd.com
Wed Jan 8 15:32:12 UTC 2020
On 2020-01-07 11:05 p.m., Alex Deucher wrote:
> Otherwise we get undefined symbols.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
There is probably a way to reduce some of the DCN guards so this won't
be an issue.
Either way this is
Reviewed-by: Harry Wentland <harry.wentland at amd.com>
Harry
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++++
> .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 10 ++++++++++
> .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h | 4 +++-
> 3 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 3be7ab0ce9e3..60d6d3b41239 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -4959,6 +4959,7 @@ const struct drm_encoder_helper_funcs amdgpu_dm_encoder_helper_funcs = {
> .atomic_check = dm_encoder_helper_atomic_check
> };
>
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
> struct dc_state *dc_state)
> {
> @@ -5021,6 +5022,7 @@ static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
> }
> return 0;
> }
> +#endif
>
> static void dm_drm_plane_reset(struct drm_plane *plane)
> {
> @@ -8156,12 +8158,14 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> if (!compute_mst_dsc_configs_for_state(state, dm_state->context))
> goto fail;
>
> ret = dm_update_mst_vcpi_slots_for_dsc(state, dm_state->context);
> if (ret)
> goto fail;
> +#endif
>
> if (dc_validate_global_state(dc, dm_state->context, false) != DC_OK) {
> ret = -EINVAL;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 7911c5dac424..5a476028ee37 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -42,7 +42,9 @@
> #endif
>
>
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> #include "dc/dcn20/dcn20_resource.h"
> +#endif
>
> /* #define TRACE_DPCD */
>
> @@ -185,6 +187,7 @@ static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
> .early_unregister = amdgpu_dm_mst_connector_early_unregister,
> };
>
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector *aconnector)
> {
> struct dc_sink *dc_sink = aconnector->dc_sink;
> @@ -206,6 +209,7 @@ static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector *aconnecto
>
> return true;
> }
> +#endif
>
> static int dm_dp_mst_get_modes(struct drm_connector *connector)
> {
> @@ -253,9 +257,11 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector)
> amdgpu_dm_update_freesync_caps(
> connector, aconnector->edid);
>
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> if (!validate_dsc_caps_on_connector(aconnector))
> memset(&aconnector->dc_sink->sink_dsc_caps,
> 0, sizeof(aconnector->dc_sink->sink_dsc_caps));
> +#endif
> }
> }
>
> @@ -506,6 +512,8 @@ int dm_mst_get_pbn_divider(struct dc_link *link)
> dc_link_get_link_cap(link)) / (8 * 1000 * 54);
> }
>
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> +
> struct dsc_mst_fairness_params {
> struct dc_crtc_timing *timing;
> struct dc_sink *sink;
> @@ -874,3 +882,5 @@ bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
>
> return true;
> }
> +
> +#endif
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h
> index d451ce9cecc0..d6813ce67bbd 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h
> @@ -34,7 +34,9 @@ int dm_mst_get_pbn_divider(struct dc_link *link);
> void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
> struct amdgpu_dm_connector *aconnector);
>
> -
> +#if defined(CONFIG_DRM_AMD_DC_DCN)
> bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
> struct dc_state *dc_state);
> #endif
> +
> +#endif
>
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