[PATCH 1/5] drm/amdgpu: only set cp active field for kiq queue

[Huang Rui]

On Tue, Jan 14, 2020 at 11:30:15PM +0800, Kuehling, Felix wrote:
> Patch 1 is
> 
> Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>
> 
> Patches 2 and 3 should be squashed. In that case they are
> 
> Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>
> 
> Patches 4 and 5 need to be tested. I think you mentioned GFX10 worked 
> (patch 4) but GFX8 was failing (patch 5). Have you found the problem? I 
> haven't seen any update to the patch.

Yes, GFX8 (patch5) failed with the page fault, I am still looking at this
issue. For other patches (verified good), I have pushed into drm-next.

Thanks,
Ray

> 
> Regards,
>    Felix
> 
> On 2020-01-14 4:36, Huang Rui wrote:
> > Ping~
> >
> > On Fri, Jan 10, 2020 at 02:37:09PM +0800, Huang, Ray wrote:
> >> The mec ucode will set the CP_HQD_ACTIVE bit while the queue is mapped by
> >> MAP_QUEUES packet. So we only need set cp active field for kiq queue.
> >>
> >> Signed-off-by: Huang Rui <ray.huang at amd.com>
> >> ---
> >>   drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 7 +++++--
> >>   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 7 +++++--
> >>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c  | 7 +++++--
> >>   3 files changed, 15 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> >> index 5b05334..22c69d8 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> >> @@ -3323,8 +3323,11 @@ static int gfx_v10_0_compute_mqd_init(struct amdgpu_ring *ring)
> >>   	tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3);
> >>   	mqd->cp_hqd_ib_control = tmp;
> >>   
> >> -	/* activate the queue */
> >> -	mqd->cp_hqd_active = 1;
> >> +	/* map_queues packet doesn't need activate the queue,
> >> +	 * so only kiq need set this field.
> >> +	 */
> >> +	if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
> >> +		mqd->cp_hqd_active = 1;
> >>   
> >>   	return 0;
> >>   }
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> >> index 8b9f440..306ee61 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> >> @@ -4558,8 +4558,11 @@ static int gfx_v8_0_mqd_init(struct amdgpu_ring *ring)
> >>   	mqd->cp_hqd_eop_wptr_mem = RREG32(mmCP_HQD_EOP_WPTR_MEM);
> >>   	mqd->cp_hqd_eop_dones = RREG32(mmCP_HQD_EOP_DONES);
> >>   
> >> -	/* activate the queue */
> >> -	mqd->cp_hqd_active = 1;
> >> +	/* map_queues packet doesn't need activate the queue,
> >> +	 * so only kiq need set this field.
> >> +	 */
> >> +	if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
> >> +		mqd->cp_hqd_active = 1;
> >>   
> >>   	return 0;
> >>   }
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> >> index 45328f9..e29818b 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> >> @@ -3313,8 +3313,11 @@ static int gfx_v9_0_mqd_init(struct amdgpu_ring *ring)
> >>   	tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3);
> >>   	mqd->cp_hqd_ib_control = tmp;
> >>   
> >> -	/* activate the queue */
> >> -	mqd->cp_hqd_active = 1;
> >> +	/* map_queues packet doesn't need activate the queue,
> >> +	 * so only kiq need set this field.
> >> +	 */
> >> +	if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
> >> +		mqd->cp_hqd_active = 1;
> >>   
> >>   	return 0;
> >>   }
> >> -- 
> >> 2.7.4
> >>