[PATCH 0/2] Adjust AMD GPU ATS quirks

[Alex Deucher]

On Wed, Jan 15, 2020 at 12:14 PM Bjorn Helgaas <helgaas at kernel.org> wrote:
>
> On Tue, Jan 14, 2020 at 05:41:44PM -0600, Bjorn Helgaas wrote:
> > On Tue, Jan 14, 2020 at 03:55:21PM -0500, Alex Deucher wrote:
> > > We've root caused the issue and clarified the quirk.
> > > This also adds a new quirk for a new GPU.
> > >
> > > Alex Deucher (2):
> > >   pci: Clarify ATS quirk
> > >   pci: add ATS quirk for navi14 board (v2)
> > >
> > >  drivers/pci/quirks.c | 32 +++++++++++++++++++++++++-------
> > >  1 file changed, 25 insertions(+), 7 deletions(-)
> >
> > I propose the following, which I intend to be functionally identical.
> > It just doesn't repeat the pci_info() and pdev->ats_cap = 0.
>
> Applied to pci/misc for v5.6, thanks!

Can we add this to stable as well?

Alex

>
> > commit 998c4f7975b0 ("PCI: Mark AMD Navi14 GPU rev 0xc5 ATS as broken")
> > Author: Bjorn Helgaas <bhelgaas at google.com>
> > Date:   Tue Jan 14 17:09:28 2020 -0600
> >
> >     PCI: Mark AMD Navi14 GPU rev 0xc5 ATS as broken
> >
> >     To account for parts of the chip that are "harvested" (disabled) due to
> >     silicon flaws, caches on some AMD GPUs must be initialized before ATS is
> >     enabled.
> >
> >     ATS is normally enabled by the IOMMU driver before the GPU driver loads, so
> >     this cache initialization would have to be done in a quirk, but that's too
> >     complex to be practical.
> >
> >     For Navi14 (device ID 0x7340), this initialization is done by the VBIOS,
> >     but apparently some boards went to production with an older VBIOS that
> >     doesn't do it.  Disable ATS for those boards.
> >
> >     https://lore.kernel.org/r/20200114205523.1054271-3-alexander.deucher@amd.com
> >     Bug: https://gitlab.freedesktop.org/drm/amd/issues/1015
> >     See-also: d28ca864c493 ("PCI: Mark AMD Stoney Radeon R7 GPU ATS as broken")
> >     See-also: 9b44b0b09dec ("PCI: Mark AMD Stoney GPU ATS as broken")
> >     Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> >     Signed-off-by: Bjorn Helgaas <bhelgaas at google.com>
> >
> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> > index 4937a088d7d8..fbeb9f73ef28 100644
> > --- a/drivers/pci/quirks.c
> > +++ b/drivers/pci/quirks.c
> > @@ -5074,18 +5074,25 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0422, quirk_no_ext_tags);
> >
> >  #ifdef CONFIG_PCI_ATS
> >  /*
> > - * Some devices have a broken ATS implementation causing IOMMU stalls.
> > - * Don't use ATS for those devices.
> > + * Some devices require additional driver setup to enable ATS.  Don't use
> > + * ATS for those devices as ATS will be enabled before the driver has had a
> > + * chance to load and configure the device.
> >   */
> > -static void quirk_no_ats(struct pci_dev *pdev)
> > +static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)
> >  {
> > -     pci_info(pdev, "disabling ATS (broken on this device)\n");
> > +     if (pdev->device == 0x7340 && pdev->revision != 0xc5)
> > +             return;
> > +
> > +     pci_info(pdev, "disabling ATS\n");
> >       pdev->ats_cap = 0;
> >  }
> >
> >  /* AMD Stoney platform GPU */
> > -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_no_ats);
> > -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_no_ats);
> > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_amd_harvest_no_ats);
> > +/* AMD Iceland dGPU */
> > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_amd_harvest_no_ats);
> > +/* AMD Navi14 dGPU */
> > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7340, quirk_amd_harvest_no_ats);
> >  #endif /* CONFIG_PCI_ATS */
> >
> >  /* Freescale PCIe doesn't support MSI in RC mode */