[PATCH 0/4] Enable RAS feature for the gc of Arcturus

[Dennis Li]

Refactor the ras related codes of vega20:
1. refine the security check for RAS functions.
2. abstract clearing edc counters to a separated function.
3. add ip prefix to ip related codes.

Implementation of RAS feature for Arcturus gfx:
1. add new register head files for gfx v9.4.1.
2. add codes to support querying of EDC counter and error injection.

Dennis Li (4):
  drm/amdgpu: refine the security check for RAS functions
  drm/amdgpu: abstract EDC counter clear to a separated function
  drm/amdgpu: add EDC counter registers of gc for Arcturus
  drm/amdgpu: add RAS support for the gfx block of Arcturus

 drivers/gpu/drm/amd/amdgpu/Makefile           |   1 +
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c         | 138 ++-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c         | 978 ++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4.h         |  35 +
 .../amd/include/asic_reg/gc/gc_9_4_1_offset.h | 264 +++++
 .../include/asic_reg/gc/gc_9_4_1_sh_mask.h    | 748 ++++++++++++++
 6 files changed, 2128 insertions(+), 36 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c
 create mode 100644 drivers/gpu/drm/amd/amdgpu/gfx_v9_4.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_1_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_1_sh_mask.h

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2.17.1