[PATCH] drm/amdgpu: remove unnecessary conversion to bool
Christian König
christian.koenig at amd.com
Mon Jan 20 13:11:37 UTC 2020
Well that's rather nice to have, but I would add something like the
following as commit message:
"Better clean that up before some automation starts to complain about it."
Am 20.01.20 um 13:58 schrieb Nirmoy Das:
> Signed-off-by: Nirmoy Das <nirmoy.das at amd.com>
With the commit message changed the patch is Acked-by: Christian König
<christian.koenig at amd.com>.
Regards,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/athub_v1_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/athub_v2_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/nv.c | 8 +++----
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/si_dma.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/soc15.c | 28 +++++++++++-----------
> drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +-
> 25 files changed, 50 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> index 82155ac3288a..12247a32f9ef 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> @@ -527,7 +527,7 @@ static int acp_set_powergating_state(void *handle,
> enum amd_powergating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = state == AMD_PG_STATE_GATE ? true : false;
> + bool enable = (state == AMD_PG_STATE_GATE);
>
> if (adev->powerplay.pp_funcs &&
> adev->powerplay.pp_funcs->set_powergating_by_smu)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index f58ec9edb73f..1da03658891c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -986,7 +986,7 @@ static void amdgpu_device_check_vm_size(struct amdgpu_device *adev)
> static void amdgpu_device_check_smu_prv_buffer_size(struct amdgpu_device *adev)
> {
> struct sysinfo si;
> - bool is_os_64 = (sizeof(void *) == 8) ? true : false;
> + bool is_os_64 = (sizeof(void *) == 8);
> uint64_t total_memory;
> uint64_t dram_size_seven_GB = 0x1B8000000;
> uint64_t dram_size_three_GB = 0xB8000000;
> diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
> index d9cc746af5e6..847ca9b3ce4e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
> @@ -74,9 +74,9 @@ int athub_v1_0_set_clockgating(struct amdgpu_device *adev,
> case CHIP_VEGA20:
> case CHIP_RAVEN:
> athub_update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> athub_update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> index ceb9aa4df0e7..921a69abda55 100644
> --- a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> @@ -77,9 +77,9 @@ int athub_v2_0_set_clockgating(struct amdgpu_device *adev,
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> athub_v2_0_update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> athub_v2_0_update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 18d79e83ef3f..e55a2c058cad 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -4230,7 +4230,7 @@ static int gfx_v10_0_set_powergating_state(void *handle,
> enum amd_powergating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_PG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_PG_STATE_GATE);
> switch (adev->asic_type) {
> case CHIP_NAVI10:
> case CHIP_NAVI14:
> @@ -4256,7 +4256,7 @@ static int gfx_v10_0_set_clockgating_state(void *handle,
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> gfx_v10_0_update_gfx_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 3a841dc20474..33e851ad4943 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -4652,7 +4652,7 @@ static int gfx_v9_0_set_powergating_state(void *handle,
> enum amd_powergating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_PG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_PG_STATE_GATE);
>
> switch (adev->asic_type) {
> case CHIP_RAVEN:
> @@ -4714,7 +4714,7 @@ static int gfx_v9_0_set_clockgating_state(void *handle,
> case CHIP_ARCTURUS:
> case CHIP_RENOIR:
> gfx_v9_0_update_gfx_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> index a78292d84854..ff2e6e1ccde7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> @@ -690,7 +690,7 @@ static int jpeg_v2_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
>
> if (enable) {
> if (jpeg_v2_0_is_idle(handle))
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> index 2c58939e6ad0..c6d046df4b70 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> @@ -469,7 +469,7 @@ static int jpeg_v2_5_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
> int i;
>
> for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index adfd8a6171eb..49a3a56ec017 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -523,9 +523,9 @@ int mmhub_v1_0_set_clockgating(struct amdgpu_device *adev,
> case CHIP_RAVEN:
> case CHIP_RENOIR:
> mmhub_v1_0_update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> mmhub_v1_0_update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> index a7cb185d639a..bde189680521 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> @@ -427,9 +427,9 @@ int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev,
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> mmhub_v2_0_update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> mmhub_v2_0_update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> index a32c9757711f..a5281df8d84f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> @@ -625,9 +625,9 @@ int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev,
> switch (adev->asic_type) {
> case CHIP_ARCTURUS:
> mmhub_v9_4_update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> mmhub_v9_4_update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
> index f737ce459c28..cf557a428298 100644
> --- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
> +++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
> @@ -426,7 +426,7 @@ static int navi10_ih_set_clockgating_state(void *handle,
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> navi10_ih_update_clockgating_state(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
> index 2e0f8933410e..2d1bebdf1603 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nv.c
> @@ -950,13 +950,13 @@ static int nv_common_set_clockgating_state(void *handle,
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> adev->nbio.funcs->update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> adev->nbio.funcs->update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> nv_update_hdp_mem_power_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> nv_update_hdp_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 2ce30a8faed8..7cea4513c303 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -2176,9 +2176,9 @@ static int sdma_v4_0_set_clockgating_state(void *handle,
> case CHIP_ARCTURUS:
> case CHIP_RENOIR:
> sdma_v4_0_update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> sdma_v4_0_update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> index 3912937f878f..7ee603db8c57 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> @@ -1525,9 +1525,9 @@ static int sdma_v5_0_set_clockgating_state(void *handle,
> case CHIP_NAVI14:
> case CHIP_NAVI12:
> sdma_v5_0_update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> sdma_v5_0_update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
> index 9ad85eddf9c4..7f64d73043cf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c
> @@ -648,7 +648,7 @@ static int si_dma_set_clockgating_state(void *handle,
> bool enable;
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> - enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + enable = (state == AMD_CG_STATE_GATE);
>
> if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) {
> for (i = 0; i < adev->sdma.num_instances; i++) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 317803f6a561..af41ee4c9639 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -1467,38 +1467,38 @@ static int soc15_common_set_clockgating_state(void *handle,
> case CHIP_VEGA12:
> case CHIP_VEGA20:
> adev->nbio.funcs->update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> adev->nbio.funcs->update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_hdp_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_drm_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_drm_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_rom_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> adev->df.funcs->update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> case CHIP_RAVEN:
> case CHIP_RENOIR:
> adev->nbio.funcs->update_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> adev->nbio.funcs->update_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_hdp_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_drm_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_drm_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> soc15_update_rom_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> case CHIP_ARCTURUS:
> soc15_update_hdp_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> index 01e62fb8e6e0..0fa8aae2d78e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> @@ -763,7 +763,7 @@ static int uvd_v5_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
>
> if (enable) {
> /* wait for STATUS to clear */
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> index 217084d56ab8..e0aadcaf6c8b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> @@ -1421,7 +1421,7 @@ static int uvd_v6_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
>
> if (enable) {
> /* wait for STATUS to clear */
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> index 475ae68f38f5..217db187207c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> @@ -739,7 +739,7 @@ static int vce_v3_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
> int i;
>
> if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> index 683701cf7270..3fd102efb7af 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> @@ -887,7 +887,7 @@ static int vce_v4_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
> int i;
>
> if ((adev->asic_type == CHIP_POLARIS10) ||
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index e654938f6cca..1a24fadd30e2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -1346,7 +1346,7 @@ static int vcn_v1_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
>
> if (enable) {
> /* wait for STATUS to clear */
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index f4db8af6536b..b8dc136d2a01 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -1213,7 +1213,7 @@ static int vcn_v2_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
>
> if (enable) {
> /* wait for STATUS to clear */
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> index c8b63d57a541..6970d3a1ae6f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> @@ -1663,7 +1663,7 @@ static int vcn_v2_5_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> - bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
> + bool enable = (state == AMD_CG_STATE_GATE);
>
> if (amdgpu_sriov_vf(adev))
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
> index d9e331084ea0..407c6093c2ec 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
> @@ -717,7 +717,7 @@ static int vega10_ih_set_clockgating_state(void *handle,
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> vega10_ih_update_clockgating_state(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> return 0;
>
> }
More information about the amd-gfx
mailing list