[PATCH 08/14] drm/amd/powerplay: drop unnecessary Arcturus specific APIs
Evan Quan
evan.quan at amd.com
Fri Jul 3 08:32:57 UTC 2020
As a common performance level setting API is used. Then these
ASIC specific APIs are not needed any more.
Change-Id: Icd96ce42218d78d670dd0c1f88663fd42108b311
Signed-off-by: Evan Quan <evan.quan at amd.com>
---
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 170 -------------------
1 file changed, 170 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
index 33d472ffb2be..afd07c497205 100644
--- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
@@ -1218,173 +1218,6 @@ static int arcturus_get_fan_speed_percent(struct smu_context *smu,
return ret;
}
-static uint32_t arcturus_find_lowest_dpm_level(struct smu_11_0_dpm_table *table)
-{
- uint32_t i;
-
- for (i = 0; i < table->count; i++) {
- if (table->dpm_levels[i].enabled)
- break;
- }
- if (i >= table->count) {
- i = 0;
- table->dpm_levels[i].enabled = true;
- }
-
- return i;
-}
-
-static uint32_t arcturus_find_highest_dpm_level(struct smu_context *smu,
- struct smu_11_0_dpm_table *table)
-{
- int i = 0;
-
- if (table->count <= 0) {
- dev_err(smu->adev->dev, "[%s] DPM Table has no entry!", __func__);
- return 0;
- }
- if (table->count > MAX_DPM_NUMBER) {
- dev_err(smu->adev->dev, "[%s] DPM Table has too many entries!", __func__);
- return MAX_DPM_NUMBER - 1;
- }
-
- for (i = table->count - 1; i >= 0; i--) {
- if (table->dpm_levels[i].enabled)
- break;
- }
- if (i < 0) {
- i = 0;
- table->dpm_levels[i].enabled = true;
- }
-
- return i;
-}
-
-static int arcturus_force_dpm_limit_value(struct smu_context *smu, bool highest)
-{
- struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
- struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(smu->adev, 0);
- uint32_t soft_level;
- int ret = 0;
-
- /* gfxclk */
- if (highest)
- soft_level = arcturus_find_highest_dpm_level(smu, &(dpm_context->dpm_tables.gfx_table));
- else
- soft_level = arcturus_find_lowest_dpm_level(&(dpm_context->dpm_tables.gfx_table));
-
- ret = arcturus_upload_dpm_level(smu,
- false,
- FEATURE_DPM_GFXCLK_MASK,
- soft_level);
- if (ret) {
- dev_err(smu->adev->dev, "Failed to upload boot level to %s!\n",
- highest ? "highest" : "lowest");
- return ret;
- }
-
- ret = arcturus_upload_dpm_level(smu,
- true,
- FEATURE_DPM_GFXCLK_MASK,
- soft_level);
- if (ret) {
- dev_err(smu->adev->dev, "Failed to upload dpm max level to %s!\n!",
- highest ? "highest" : "lowest");
- return ret;
- }
-
- if (hive)
- /*
- * Force XGMI Pstate to highest or lowest
- * TODO: revise this when xgmi dpm is functional
- */
- ret = smu_v11_0_set_xgmi_pstate(smu, highest ? 1 : 0);
-
- return ret;
-}
-
-static int arcturus_unforce_dpm_levels(struct smu_context *smu)
-{
- struct smu_11_0_dpm_context *dpm_context =
- (struct smu_11_0_dpm_context *)smu->smu_dpm.dpm_context;
- struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(smu->adev, 0);
- uint32_t soft_min_level, soft_max_level;
- int ret = 0;
-
- /* gfxclk */
- soft_min_level = arcturus_find_lowest_dpm_level(&(dpm_context->dpm_tables.gfx_table));
- soft_max_level = arcturus_find_highest_dpm_level(smu, &(dpm_context->dpm_tables.gfx_table));
-
- ret = arcturus_upload_dpm_level(smu,
- false,
- FEATURE_DPM_GFXCLK_MASK,
- soft_min_level);
- if (ret) {
- dev_err(smu->adev->dev, "Failed to upload DPM Bootup Levels!");
- return ret;
- }
-
- ret = arcturus_upload_dpm_level(smu,
- true,
- FEATURE_DPM_GFXCLK_MASK,
- soft_max_level);
- if (ret) {
- dev_err(smu->adev->dev, "Failed to upload DPM Max Levels!");
- return ret;
- }
-
- if (hive)
- /*
- * Reset XGMI Pstate back to default
- * TODO: revise this when xgmi dpm is functional
- */
- ret = smu_v11_0_set_xgmi_pstate(smu, 0);
-
- return ret;
-}
-
-static int
-arcturus_get_profiling_clk_mask(struct smu_context *smu,
- enum amd_dpm_forced_level level,
- uint32_t *sclk_mask,
- uint32_t *mclk_mask,
- uint32_t *soc_mask)
-{
- struct smu_11_0_dpm_context *dpm_context =
- (struct smu_11_0_dpm_context *)smu->smu_dpm.dpm_context;
- struct smu_11_0_dpm_table *gfx_dpm_table;
- struct smu_11_0_dpm_table *mem_dpm_table;
- struct smu_11_0_dpm_table *soc_dpm_table;
-
- gfx_dpm_table = &dpm_context->dpm_tables.gfx_table;
- mem_dpm_table = &dpm_context->dpm_tables.uclk_table;
- soc_dpm_table = &dpm_context->dpm_tables.soc_table;
-
- *sclk_mask = 0;
- *mclk_mask = 0;
- *soc_mask = 0;
-
- if (gfx_dpm_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL &&
- mem_dpm_table->count > ARCTURUS_UMD_PSTATE_MCLK_LEVEL &&
- soc_dpm_table->count > ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL) {
- *sclk_mask = ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL;
- *mclk_mask = ARCTURUS_UMD_PSTATE_MCLK_LEVEL;
- *soc_mask = ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL;
- }
-
- if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) {
- *sclk_mask = 0;
- } else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) {
- *mclk_mask = 0;
- } else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {
- *sclk_mask = gfx_dpm_table->count - 1;
- *mclk_mask = mem_dpm_table->count - 1;
- *soc_mask = soc_dpm_table->count - 1;
- }
-
- return 0;
-}
-
static int arcturus_get_power_limit(struct smu_context *smu)
{
struct smu_11_0_powerplay_table *powerplay_table =
@@ -2534,9 +2367,6 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
.read_sensor = arcturus_read_sensor,
.get_fan_speed_percent = arcturus_get_fan_speed_percent,
.get_fan_speed_rpm = arcturus_get_fan_speed_rpm,
- .force_dpm_limit_value = arcturus_force_dpm_limit_value,
- .unforce_dpm_levels = arcturus_unforce_dpm_levels,
- .get_profiling_clk_mask = arcturus_get_profiling_clk_mask,
.get_power_profile_mode = arcturus_get_power_profile_mode,
.set_power_profile_mode = arcturus_set_power_profile_mode,
.set_performance_level = arcturus_set_performance_level,
--
2.27.0
More information about the amd-gfx
mailing list