[PATCH 1/1] drm/amd/display: Add missing reg mask for dcn3

Rodrigo Siqueira Rodrigo.Siqueira at amd.com
Mon Jul 6 18:45:38 UTC 2020


LGTM

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>

On 07/02, Bhawanpreet Lakha wrote:
> This mask is missing for dcn3 so add it from dcn20.
> 
> enc2_set_dynamic_metadata() trys to sets this and we get a
> generic_reg warning since the mask is not defined.
> 
> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>
> ---
>  drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h
> index 8db6d76a1131..0b1755f1dea8 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h
> @@ -248,6 +248,7 @@
>  	SE_SF(DIG0_HDMI_METADATA_PACKET_CONTROL, HDMI_METADATA_PACKET_ENABLE, mask_sh),\
>  	SE_SF(DIG0_HDMI_METADATA_PACKET_CONTROL, HDMI_METADATA_PACKET_LINE_REFERENCE, mask_sh),\
>  	SE_SF(DIG0_HDMI_METADATA_PACKET_CONTROL, HDMI_METADATA_PACKET_LINE, mask_sh),\
> +	SE_SF(DIG0_DIG_FE_CNTL, DOLBY_VISION_EN, mask_sh),\
>  	SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_COMBINE, mask_sh),\
>  	SE_SF(DP0_DP_SEC_FRAMING4, DP_SST_SDP_SPLITTING, mask_sh),\
>  	SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh)
> -- 
> 2.17.1
> 
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-- 
Rodrigo Siqueira
https://siqueira.tech
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