[PATCH] drm/amd/display: Add missing CW4 programming for DCN30

[Lakha, Bhawanpreet]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>
________________________________
From: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
Sent: July 7, 2020 11:41 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Kazlauskas, Nicholas <Nicholas.Kazlauskas at amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha at amd.com>
Subject: [PATCH] drm/amd/display: Add missing CW4 programming for DCN30

[Why]
To support inbox1 in CW4 we need to actually program CW4 instead of
region 4 for newer firmware.

This is done correctly on DCN20/DCN21 but this code wasn't added to
DCN30.

[How]
Copy over the missing code. It doesn't need address translation since
DCN30 uses virtual addressing.

Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
---
 .../gpu/drm/amd/display/dmub/src/dmub_dcn30.c | 21 ++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
index ba8d0bfb5522..215178b8d415 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
@@ -153,11 +153,22 @@ void dmub_dcn30_setup_windows(struct dmub_srv *dmub,

         offset = cw4->offset;

-       REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part);
-       REG_WRITE(DMCUB_REGION4_OFFSET_HIGH, offset.u.high_part);
-       REG_SET_2(DMCUB_REGION4_TOP_ADDRESS, 0, DMCUB_REGION4_TOP_ADDRESS,
-                 cw4->region.top - cw4->region.base - 1, DMCUB_REGION4_ENABLE,
-                 1);
+       /* New firmware can support CW4. */
+       if (dmub->fw_version > DMUB_FW_VERSION(1, 0, 10)) {
+               REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);
+               REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);
+               REG_WRITE(DMCUB_REGION3_CW4_BASE_ADDRESS, cw4->region.base);
+               REG_SET_2(DMCUB_REGION3_CW4_TOP_ADDRESS, 0,
+                         DMCUB_REGION3_CW4_TOP_ADDRESS, cw4->region.top,
+                         DMCUB_REGION3_CW4_ENABLE, 1);
+       } else {
+               REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part);
+               REG_WRITE(DMCUB_REGION4_OFFSET_HIGH, offset.u.high_part);
+               REG_SET_2(DMCUB_REGION4_TOP_ADDRESS, 0,
+                         DMCUB_REGION4_TOP_ADDRESS,
+                         cw4->region.top - cw4->region.base - 1,
+                         DMCUB_REGION4_ENABLE, 1);
+       }

         offset = cw5->offset;

--
2.25.1

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