[PATCH 1/1] drm/amdkfd: sparse: fix incorrect type in assignment
philip yang
yangp at amd.com
Tue Jul 14 17:54:25 UTC 2020
Reviewed-by: Philip Yang <Philip.Yang at amd.com>
On 2020-07-06 1:45 p.m., Felix Kuehling wrote:
> Ping.
>
> Am 2020-06-26 um 7:39 p.m. schrieb Felix Kuehling:
>> The correct way to implement the fops->poll callback uses EPOLL* macros.
>>
>> For reference see also:
>> commit a9a08845e9ac ("vfs: do bulk POLL* -> EPOLL* replacement")
>> commit 7a163b2195cd ("unify {de,}mangle_poll(), get rid of kernel-side POLL...")
>>
>> Reported-by: kernel test robot <lkp at intel.com>
>> Fixes: 73b753a11ae9 ("drm/amdkfd: Provide SMI events watch")
>> Signed-off-by: Felix Kuehling <Felix.Kuehling at amd.com>
>> ---
>> drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
>> index f3782627407f..7b348bf9df21 100644
>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
>> @@ -59,13 +59,14 @@ static const struct file_operations kfd_smi_ev_fops = {
>> static __poll_t kfd_smi_ev_poll(struct file *filep,
>> struct poll_table_struct *wait)
>> {
>> - __poll_t mask;
>> struct kfd_smi_client *client = filep->private_data;
>> + __poll_t mask = 0;
>>
>> poll_wait(filep, &client->wait_queue, wait);
>>
>> spin_lock(&client->lock);
>> - mask = kfifo_is_empty(&client->fifo) ? 0 : POLLIN | POLLRDNORM;
>> + if (!kfifo_is_empty(&client->fifo))
>> + mask = EPOLLIN | EPOLLRDNORM;
>> spin_unlock(&client->lock);
>>
>> return mask;
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cphilip.yang%40amd.com%7C1359cbce5ac84b5dd02608d821d46a48%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637296543503819875&sdata=Q1KlOB%2FlF1GdUHTMD8a5NycjBDGhSDxo7qlIT8kyXeE%3D&reserved=0
More information about the amd-gfx
mailing list