[PATCH 31/42] drm/amdgpu: enable cp_fw_write_wait for navy_flounder

[Alex Deucher]

From: Jiansong Chen <Jiansong.Chen at amd.com>

It's the same with sienna_cichlid, cp fw for navy_flounder
can support WAIT_REG_MEM packet.

Signed-off-by: Jiansong Chen <Jiansong.Chen at amd.com>
Reviewed-by: Tao Zhou <tao.zhou1 at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index ad9b5969c3b6..3f189348cee7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3538,6 +3538,7 @@ static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev)
 			adev->gfx.cp_fw_write_wait = true;
 		break;
 	case CHIP_SIENNA_CICHLID:
+	case CHIP_NAVY_FLOUNDER:
 		adev->gfx.cp_fw_write_wait = true;
 		break;
 	default:
-- 
2.25.4