[PATCH] drm/amdgpu: fix warning in navi10_ih.c

Alex Deucher alexdeucher at gmail.com
Tue Jul 21 17:22:24 UTC 2020


declarations after statements.  Trivial.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index f16909989c0d..350f1bf063c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
@@ -58,11 +58,13 @@ static void
 force_update_wptr_for_self_int(struct amdgpu_device *adev,
 			       u32 threshold, u32 timeout, bool enabled)
 {
+	u32 ih_cntl, ih_rb_cntl;
+
 	if (adev->asic_type < CHIP_SIENNA_CICHLID)
 		return;
 
-	u32 ih_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_CNTL2);
-	u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
+	ih_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_CNTL2);
+	ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
 
 	ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2,
 				SELF_IV_FORCE_WPTR_UPDATE_TIMEOUT, timeout);
-- 
2.25.4



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