[PATCH] drm/amd/powerplay: update driver if file for sienna_cichlid

[Feng, Kenneth]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>


在 2020/7/24 下午5:39，“Gao, Likun”<Likun.Gao at amd.com> 写入:

    From: Likun Gao <Likun.Gao at amd.com>

    Update sienna_cichlid driver if header and related files.
    Support new smu metrics for pre & postDS frequency.

    Signed-off-by: Likun Gao <Likun.Gao at amd.com>
    Change-Id: I5446256fd7082a1d51df4ade3828bf5fa1ea3e7f
    ---
     .../inc/smu11_driver_if_sienna_cichlid.h      | 21 +++++++++++++------
     drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h |  2 +-
     .../drm/amd/powerplay/sienna_cichlid_ppt.c    | 11 +++++++---
     3 files changed, 24 insertions(+), 10 deletions(-)

    diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h
    index b2232e24d82f..aa2708fccb6d 100644
    --- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h
    +++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h
    @@ -27,7 +27,7 @@
     // *** IMPORTANT ***
     // SMU TEAM: Always increment the interface version if
     // any structure is changed in this file
    -#define SMU11_DRIVER_IF_VERSION 0x33
    +#define SMU11_DRIVER_IF_VERSION 0x34

     #define PPTABLE_Sienna_Cichlid_SMU_VERSION 5

    @@ -968,9 +968,15 @@ typedef struct {

     typedef struct {
       uint32_t CurrClock[PPCLK_COUNT];
    -  uint16_t AverageGfxclkFrequency;
    -  uint16_t AverageFclkFrequency;
    -  uint16_t AverageUclkFrequency  ;
    +
    +  uint16_t AverageGfxclkFrequencyPreDs;
    +  uint16_t AverageGfxclkFrequencyPostDs;
    +  uint16_t AverageFclkFrequencyPreDs;
    +  uint16_t AverageFclkFrequencyPostDs;
    +  uint16_t AverageUclkFrequencyPreDs  ;
    +  uint16_t AverageUclkFrequencyPostDs  ;
    +
    +
       uint16_t AverageGfxActivity    ;
       uint16_t AverageUclkActivity   ;
       uint8_t  CurrSocVoltageOffset  ;
    @@ -988,6 +994,7 @@ typedef struct {
       uint16_t TemperatureLiquid0    ;
       uint16_t TemperatureLiquid1    ;
       uint16_t TemperaturePlx        ;
    +  uint16_t Padding16             ;
       uint32_t ThrottlerStatus       ;

       uint8_t  LinkDpmLevel;
    @@ -1006,8 +1013,10 @@ typedef struct {
       uint16_t AverageDclk0Frequency  ;
       uint16_t AverageVclk1Frequency  ;
       uint16_t AverageDclk1Frequency  ;
    -  uint16_t VcnActivityPercentage ; //place holder, David N. to provide full sequence
    -  uint16_t padding16_2;
    +  uint16_t VcnActivityPercentage  ; //place holder, David N. to provide full sequence
    +  uint8_t  PcieRate               ;
    +  uint8_t  PcieWidth              ;
    +
     } SmuMetrics_t;

     typedef struct {
    diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
    index 429f5aa8924a..9504f9954fd3 100644
    --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
    +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
    @@ -30,7 +30,7 @@
     #define SMU11_DRIVER_IF_VERSION_NV10 0x36
     #define SMU11_DRIVER_IF_VERSION_NV12 0x33
     #define SMU11_DRIVER_IF_VERSION_NV14 0x36
    -#define SMU11_DRIVER_IF_VERSION_Sienna_Cichlid 0x33
    +#define SMU11_DRIVER_IF_VERSION_Sienna_Cichlid 0x34
     #define SMU11_DRIVER_IF_VERSION_Navy_Flounder 0x2

     /* MP Apertures */
    diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
    index dcc5d25a7894..f64a1be94cb8 100644
    --- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
    +++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
    @@ -70,6 +70,8 @@
     FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | \
     FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT))

    +#define SMU_11_0_7_GFX_BUSY_THRESHOLD 15
    +
     static struct cmn2asic_msg_mapping sienna_cichlid_message_map[SMU_MSG_MAX_COUNT] = {
     MSG_MAP(TestMessage,PPSMC_MSG_TestMessage,                 1),
     MSG_MAP(GetSmuVersion,PPSMC_MSG_GetSmuVersion,               1),
    @@ -443,13 +445,16 @@ static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
     *value = metrics->CurrClock[PPCLK_DCEFCLK];
     break;
     case METRICS_AVERAGE_GFXCLK:
    -*value = metrics->AverageGfxclkFrequency;
    +if (metrics->AverageGfxActivity <= SMU_11_0_7_GFX_BUSY_THRESHOLD)
    +*value = metrics->AverageGfxclkFrequencyPostDs;
    +else
    +*value = metrics->AverageGfxclkFrequencyPreDs;
     break;
     case METRICS_AVERAGE_FCLK:
    -*value = metrics->AverageFclkFrequency;
    +*value = metrics->AverageFclkFrequencyPostDs;
     break;
     case METRICS_AVERAGE_UCLK:
    -*value = metrics->AverageUclkFrequency;
    +*value = metrics->AverageUclkFrequencyPostDs;
     break;
     case METRICS_AVERAGE_GFXACTIVITY:
     *value = metrics->AverageGfxActivity;
    --
    2.25.1