[PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV

Deucher, Alexander Alexander.Deucher at amd.com
Mon Jul 27 16:15:32 UTC 2020


[AMD Official Use Only - Internal Distribution Only]

Please fix your git setup to use your name rather than "root" as the author.

Alex

________________________________
From: Liu ChengZhe <ChengZhe.Liu at amd.com>
Sent: Monday, July 27, 2020 6:57 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Tuikov, Luben <Luben.Tuikov at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Xiao, Jack <Jack.Xiao at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>; Xu, Feifei <Feifei.Xu at amd.com>; Wang, Kevin(Yang) <Kevin1.Wang at amd.com>; Yuan, Xiaojie <Xiaojie.Yuan at amd.com>; Liu, Cheng Zhe <ChengZhe.Liu at amd.com>
Subject: [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV

From: root <ChengZhe.Liu at amd.com>

    1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
    2. Check pointer before release firmware.

Signed-off-by: root <ChengZhe.Liu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 40 +++++++++++++++++++++----
 1 file changed, 34 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a053b7af0680..a9481e112cb3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
         struct amdgpu_device *adev = (struct amdgpu_device *)handle;

         psp_memory_training_fini(&adev->psp);
-       release_firmware(adev->psp.sos_fw);
-       adev->psp.sos_fw = NULL;
-       release_firmware(adev->psp.asd_fw);
-       adev->psp.asd_fw = NULL;
-       release_firmware(adev->psp.ta_fw);
-       adev->psp.ta_fw = NULL;
+       if (adev->psp.sos_fw) {
+               release_firmware(adev->psp.sos_fw);
+               adev->psp.sos_fw = NULL;
+       }
+       if (adev->psp.asd_fw) {
+               release_firmware(adev->psp.asd_fw);
+               adev->psp.asd_fw = NULL;
+       }
+       if (adev->psp.ta_fw) {
+               release_firmware(adev->psp.ta_fw);
+               adev->psp.ta_fw = NULL;
+       }

         if (adev->asic_type == CHIP_NAVI10)
                 psp_sysfs_fini(adev);
@@ -409,11 +415,33 @@ static int psp_clear_vf_fw(struct psp_context *psp)
         return ret;
 }

+static bool psp_skip_tmr(struct psp_context *psp)
+{
+       bool ret = false;
+
+       switch (psp->adev->asic_type) {
+       case CHIP_NAVI12:
+       case CHIP_SIENNA_CICHLID:
+               ret = true;
+               break;
+       default:
+               return false;
+       }
+
+       return ret;
+}
+
 static int psp_tmr_load(struct psp_context *psp)
 {
         int ret;
         struct psp_gfx_cmd_resp *cmd;

+       /* for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not setup TMR
+        * (already setup by host driver)
+        */
+       if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
+               return 0;
+
         cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
         if (!cmd)
                 return -ENOMEM;
--
2.25.1

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