[PATCH 103/207] drm/amdgpu: change the offset for VCN FW cache window
Alex Deucher
alexdeucher at gmail.com
Mon Jun 1 18:19:10 UTC 2020
From: Leo Liu <leo.liu at amd.com>
The signed header is added
Signed-off-by: Leo Liu <leo.liu at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 011edbdd4e55..371c70a1e611 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -356,11 +356,8 @@ static void vcn_v3_0_mc_resume(struct amdgpu_device *adev, int inst)
WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
upper_32_bits(adev->vcn.inst[inst].gpu_addr));
offset = size;
- /* No signed header for now from firmware
WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET0,
AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
- */
- WREG32_SOC15(UVD, inst, mmUVD_VCPU_CACHE_OFFSET0, 0);
}
WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE0, size);
--
2.25.4
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