[PATCH 6/9] drm/amd/powerplay: clean up the overdrive settings

Alex Deucher alexdeucher at gmail.com
Tue Jun 2 15:06:23 UTC 2020


On Mon, Jun 1, 2020 at 3:31 AM Evan Quan <evan.quan at amd.com> wrote:
>
> Eliminate the buffer allocation and drop the unnecessary
> overdrive table uploading.
>
> Change-Id: I8ba5383a330e6d5355cea219147500c1b4a43f47
> Signed-off-by: Evan Quan <evan.quan at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/amdgpu_smu.c    |  2 +-
>  .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h    |  2 +-
>  drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h |  2 -
>  drivers/gpu/drm/amd/powerplay/navi10_ppt.c    | 74 +++++++++----------
>  drivers/gpu/drm/amd/powerplay/smu_internal.h  |  4 +-
>  drivers/gpu/drm/amd/powerplay/smu_v11_0.c     | 20 -----
>  6 files changed, 38 insertions(+), 66 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> index b079ac6325d0..9b81b6519a96 100644
> --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> @@ -1215,7 +1215,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
>         if (ret)
>                 return ret;
>
> -       ret = smu_set_default_od_settings(smu, initialize);
> +       ret = smu_set_default_od_settings(smu);
>         if (ret)
>                 return ret;
>
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
> index 14f4a850b553..4aa63dc79124 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
> @@ -480,7 +480,7 @@ struct pptable_funcs {
>                                              uint32_t *value);
>         int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range);
>         int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);
> -       int (*set_default_od_settings)(struct smu_context *smu, bool initialize);
> +       int (*set_default_od_settings)(struct smu_context *smu);
>         int (*set_performance_level)(struct smu_context *smu, enum amd_dpm_forced_level level);
>         int (*display_disable_memory_clock_switch)(struct smu_context *smu, bool disable_memory_clock_switch);
>         void (*dump_pptable)(struct smu_context *smu);
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
> index 51868dc33238..8d317e05f65b 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
> @@ -258,8 +258,6 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_
>
>  int smu_v11_0_override_pcie_parameters(struct smu_context *smu);
>
> -int smu_v11_0_set_default_od_settings(struct smu_context *smu, bool initialize, size_t overdrive_table_size);
> -
>  uint32_t smu_v11_0_get_max_power_limit(struct smu_context *smu);
>
>  int smu_v11_0_set_performance_level(struct smu_context *smu,
> diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> index db38fb10524d..caa4355b601e 100644
> --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> @@ -1969,55 +1969,49 @@ static bool navi10_is_baco_supported(struct smu_context *smu)
>         return (val & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK) ? true : false;
>  }
>
> -static int navi10_set_default_od_settings(struct smu_context *smu, bool initialize) {
> -       OverDriveTable_t *od_table, *boot_od_table;
> +static int navi10_set_default_od_settings(struct smu_context *smu)
> +{
> +       OverDriveTable_t *od_table =
> +               (OverDriveTable_t *)smu->smu_table.overdrive_table;
> +       OverDriveTable_t *boot_od_table =
> +               (OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
>         int ret = 0;
>
> -       ret = smu_v11_0_set_default_od_settings(smu, initialize, sizeof(OverDriveTable_t));
> -       if (ret)
> +       ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, false);
> +       if (ret) {
> +               pr_err("Failed to get overdrive table!\n");
>                 return ret;
> +       }
>
> -       od_table = (OverDriveTable_t *)smu->smu_table.overdrive_table;
> -       boot_od_table = (OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
> -       if (initialize) {
> -               if (od_table) {
> -                       if (!od_table->GfxclkVolt1) {
> -                               ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
> -                                                                               &od_table->GfxclkVolt1,
> -                                                                               od_table->GfxclkFreq1);
> -                               if (ret)
> -                                       od_table->GfxclkVolt1 = 0;
> -                               if (boot_od_table)
> -                                       boot_od_table->GfxclkVolt1 = od_table->GfxclkVolt1;
> -                       }
> -
> -                       if (!od_table->GfxclkVolt2) {
> -                               ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
> -                                                                               &od_table->GfxclkVolt2,
> -                                                                               od_table->GfxclkFreq2);
> -                               if (ret)
> -                                       od_table->GfxclkVolt2 = 0;
> -                               if (boot_od_table)
> -                                       boot_od_table->GfxclkVolt2 = od_table->GfxclkVolt2;
> -                       }
> +       if (!od_table->GfxclkVolt1) {
> +               ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
> +                                                               &od_table->GfxclkVolt1,
> +                                                               od_table->GfxclkFreq1);
> +               if (ret)
> +                       return ret;
> +       }
>
> -                       if (!od_table->GfxclkVolt3) {
> -                               ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
> -                                                                               &od_table->GfxclkVolt3,
> -                                                                               od_table->GfxclkFreq3);
> -                               if (ret)
> -                                       od_table->GfxclkVolt3 = 0;
> -                               if (boot_od_table)
> -                                       boot_od_table->GfxclkVolt3 = od_table->GfxclkVolt3;
> -                       }
> -               }
> +       if (!od_table->GfxclkVolt2) {
> +               ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
> +                                                               &od_table->GfxclkVolt2,
> +                                                               od_table->GfxclkFreq2);
> +               if (ret)
> +                       return ret;
>         }
>
> -       if (od_table) {
> -               navi10_dump_od_table(od_table);
> +       if (!od_table->GfxclkVolt3) {
> +               ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
> +                                                               &od_table->GfxclkVolt3,
> +                                                               od_table->GfxclkFreq3);
> +               if (ret)
> +                       return ret;
>         }
>
> -       return ret;
> +       memcpy(boot_od_table, od_table, sizeof(OverDriveTable_t));
> +
> +       navi10_dump_od_table(od_table);
> +
> +       return 0;
>  }
>
>  static int navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) {
> diff --git a/drivers/gpu/drm/amd/powerplay/smu_internal.h b/drivers/gpu/drm/amd/powerplay/smu_internal.h
> index 33086f94267a..0c7d5f0b1cd1 100644
> --- a/drivers/gpu/drm/amd/powerplay/smu_internal.h
> +++ b/drivers/gpu/drm/amd/powerplay/smu_internal.h
> @@ -70,8 +70,8 @@
>         ((smu)->ppt_funcs->system_features_control ? (smu)->ppt_funcs->system_features_control((smu), (en)) : 0)
>  #define smu_init_max_sustainable_clocks(smu) \
>         ((smu)->ppt_funcs->init_max_sustainable_clocks ? (smu)->ppt_funcs->init_max_sustainable_clocks((smu)) : 0)
> -#define smu_set_default_od_settings(smu, initialize) \
> -       ((smu)->ppt_funcs->set_default_od_settings ? (smu)->ppt_funcs->set_default_od_settings((smu), (initialize)) : 0)
> +#define smu_set_default_od_settings(smu) \
> +       ((smu)->ppt_funcs->set_default_od_settings ? (smu)->ppt_funcs->set_default_od_settings((smu)) : 0)
>
>  #define smu_send_smc_msg_with_param(smu, msg, param, read_arg) \
>         ((smu)->ppt_funcs->send_smc_msg_with_param? (smu)->ppt_funcs->send_smc_msg_with_param((smu), (msg), (param), (read_arg)) : 0)
> diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> index 7a97a4510c6d..891781a5c0d4 100644
> --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> @@ -1898,26 +1898,6 @@ int smu_v11_0_override_pcie_parameters(struct smu_context *smu)
>
>  }
>
> -int smu_v11_0_set_default_od_settings(struct smu_context *smu, bool initialize, size_t overdrive_table_size)
> -{
> -       struct smu_table_context *table_context = &smu->smu_table;
> -       int ret = 0;
> -
> -       if (initialize) {
> -               ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, table_context->overdrive_table, false);
> -               if (ret) {
> -                       pr_err("Failed to export overdrive table!\n");
> -                       return ret;
> -               }
> -       }
> -       ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, table_context->overdrive_table, true);
> -       if (ret) {
> -               pr_err("Failed to import overdrive table!\n");
> -               return ret;
> -       }
> -       return ret;
> -}
> -
>  int smu_v11_0_set_performance_level(struct smu_context *smu,
>                                     enum amd_dpm_forced_level level)
>  {
> --
> 2.26.2
>
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