[PATCH] drm/amdgpu: restrict bo mapping within gpu address limits
Bhardwaj, Rajneesh
rajneesh.bhardwaj at amd.com
Tue Jun 2 20:46:27 UTC 2020
On 6/2/2020 3:51 PM, Christian König wrote:
> Hi Rajneesh,
>
> I think we have reviewed the patch multiple times now, you can push it
> to the amd-staging-drm-next branch.
Thanks Christian. Just wanted to make sure its sent once on the public
list. I'll push it to the branch now.
>
> Regards,
> Christian.
>
> Am 02.06.20 um 20:27 schrieb Rajneesh Bhardwaj:
>> Have strict check on bo mapping since on some systems, such as A+A or
>> hybrid, the cpu might support 5 level paging or can address memory above
>> 48 bits but gpu might be limited by hardware to just use 48 bits. In
>> general, this applies to all asics where this limitation can be checked
>> against their max_pfn range. This restricts the range to map bo within
>> pratical limits of cpu and gpu for shared virtual memory access.
>>
>> Reviewed-by: Oak Zeng <oak.zeng at amd.com>
>> Reviewed-by: Christian König <christian.koenig at amd.com>
>> Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
>> Acked-by: Alex Deucher <alexander.deucher at amd.com>
>> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj at amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> index 7417754e9141..71e005cf2952 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> @@ -2208,7 +2208,8 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
>> /* make sure object fit at this offset */
>> eaddr = saddr + size - 1;
>> if (saddr >= eaddr ||
>> - (bo && offset + size > amdgpu_bo_size(bo)))
>> + (bo && offset + size > amdgpu_bo_size(bo)) ||
>> + (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT))
>> return -EINVAL;
>> saddr /= AMDGPU_GPU_PAGE_SIZE;
>> @@ -2273,7 +2274,8 @@ int amdgpu_vm_bo_replace_map(struct
>> amdgpu_device *adev,
>> /* make sure object fit at this offset */
>> eaddr = saddr + size - 1;
>> if (saddr >= eaddr ||
>> - (bo && offset + size > amdgpu_bo_size(bo)))
>> + (bo && offset + size > amdgpu_bo_size(bo)) ||
>> + (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT))
>> return -EINVAL;
>> /* Allocate all the needed memory */
>
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