[PATCH] drm/amdgpu/display: use blanked rather than plane state for sync groups

Kazlauskas, Nicholas nicholas.kazlauskas at amd.com
Tue Jun 2 21:50:03 UTC 2020


On 2020-06-02 5:25 p.m., Alex Deucher wrote:
> We may end up with no planes set yet, depending on the ordering, but we
> should have the proper blanking state which is either handled by either
> DPG or TG depending on the hardware generation.  Check both to determine
> the proper blanked state.
> 
> Bug: https://gitlab.freedesktop.org/drm/amd/issues/781
> Fixes: 5fc0cbfad45648 ("drm/amd/display: determine if a pipe is synced by plane state")
> Cc: nicholas.kazlauskas at amd.com
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

This looks good to me now from a conceptual level. I guess we'll find 
out later if it breaks anything.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>

Regards,
Nicholas Kazlauskas

> ---
>   drivers/gpu/drm/amd/display/dc/core/dc.c | 24 ++++++++++++++++++++----
>   1 file changed, 20 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
> index 04c3d9f7e323..7fdb6149047d 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
> @@ -1017,9 +1017,17 @@ static void program_timing_sync(
>   			}
>   		}
>   
> -		/* set first pipe with plane as master */
> +		/* set first unblanked pipe as master */
>   		for (j = 0; j < group_size; j++) {
> -			if (pipe_set[j]->plane_state) {
> +			bool is_blanked;
> +
> +			if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)
> +				is_blanked =
> +					pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);
> +			else
> +				is_blanked =
> +					pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);
> +			if (!is_blanked) {
>   				if (j == 0)
>   					break;
>   
> @@ -1040,9 +1048,17 @@ static void program_timing_sync(
>   				status->timing_sync_info.master = false;
>   
>   		}
> -		/* remove any other pipes with plane as they have already been synced */
> +		/* remove any other unblanked pipes as they have already been synced */
>   		for (j = j + 1; j < group_size; j++) {
> -			if (pipe_set[j]->plane_state) {
> +			bool is_blanked;
> +
> +			if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)
> +				is_blanked =
> +					pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);
> +			else
> +				is_blanked =
> +					pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);
> +			if (!is_blanked) {
>   				group_size--;
>   				pipe_set[j] = pipe_set[group_size];
>   				j--;
> 



More information about the amd-gfx mailing list