[PATCH] drm/amdgpu: temporarily read bounding box from gpu_info fw for navi12

Xu, Feifei Feifei.Xu at amd.com
Wed Jun 3 02:25:30 UTC 2020


[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Feifei Xu <Feifei.Xu at amd.com>

-----Original Message-----
From: Tianci Yin <tianci.yin at amd.com>
Sent: Wednesday, June 3, 2020 10:08 AM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Xu, Feifei <Feifei.Xu at amd.com>; Yuan, Xiaojie <Xiaojie.Yuan at amd.com>; Li, Pauline <Pauline.Li at amd.com>; Yin, Tianci (Rico) <Tianci.Yin at amd.com>
Subject: [PATCH] drm/amdgpu: temporarily read bounding box from gpu_info fw for navi12

From: "Tianci.Yin" <tianci.yin at amd.com>

The bounding box is still needed by Navi12, temporarily read it from gpu_info firmware. Should be droped when DAL no longer needs it.

Change-Id: Ifc330ec860f9b0665134a81df2fc80ca91c41a33
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan at amd.com>
Signed-off-by: Tianci.Yin <tianci.yin at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 15de344438d2..1df28b7bf22e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1537,7 +1537,14 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)

 if (adev->discovery_bin) {
 amdgpu_discovery_get_gfx_info(adev);
-return 0;
+
+/*
+ * FIXME: The bounding box is still needed by Navi12, so
+ * temporarily read it from gpu_info firmware. Should be droped
+ * when DAL no longer needs it.
+ */
+if (adev->asic_type != CHIP_NAVI12)
+return 0;
 }

 switch (adev->asic_type) {
@@ -1627,6 +1634,12 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
 (const struct gpu_info_firmware_v1_0 *)(adev->firmware.gpu_info_fw->data +
 le32_to_cpu(hdr->header.ucode_array_offset_bytes));

+/*
+ * Should be droped when DAL no longer needs it.
+ */
+if (adev->asic_type == CHIP_NAVI12)
+goto parse_soc_bounding_box;
+
 adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se);
 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh);
 adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se);
@@ -1655,6 +1668,7 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
 le32_to_cpu(gpu_info_fw->num_packer_per_sc);
 }

+parse_soc_bounding_box:
 /*
  * soc bounding box info is not integrated in disocovery table,
  * we always need to parse it from gpu info firmware if needed.
--
2.17.1



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