[PATCH v5 1/4] drm/amdgpu: set compute queue priority at mqd_init

Nirmoy nirmodas at amd.com
Tue Mar 3 12:39:25 UTC 2020


On 3/2/20 6:16 PM, Christian König wrote:
>
>> or else
>>
>> @@ -222,7 +229,8 @@ struct amdgpu_ring {
>>         struct mutex            priority_mutex;
>>         /* protected by priority_mutex */
>>         int                     priority;
>> -       bool                    gfx_pipe_priority;
>> +
>> +       enum gfx_pipe_priority  pipe_priority;
>>
>> doesn't work because of compilation error: " field ‘pipe_priority’ 
>> has incomplete type"
>
> Mhm, let me ask from the other direction: What is that good for in the 
> first place?
>
> As far as I can see this is just to communicate to the ctx handling 
> what priority a hw ring has, right?
>
> But what we actually need in the ctx handling is an array of ring with 
> normal and high priorty. So why don't we create that in the first place?

Do you mean to create two array ring for both priority ? We still need a 
way to detect ring priority in ctx to populate those array in 
amdgpu_ctx_init_sched.

I think the previous approach to have bool to indicate ring priority 
status should be good enough for ctx. Let me send the next version of 
the patch

to explain what I mean.

Regards,

Nirmoy

>
> Regards,
> Christian.
>


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