[PATCH] drm/amdgpu: Use better names to reflect it is CP MQD buffer

Christian König ckoenig.leichtzumerken at gmail.com
Thu Mar 5 11:32:01 UTC 2020


Am 04.03.20 um 21:35 schrieb Yong Zhao:
> Add "CP" to AMDGPU_GEM_CREATE_MQD_GFX9 to indicate it is only for CP MQD.

You should probably note that we can do this because it was always 
illegal for userspace to use the flag.

> Change-Id: Ie69cd3ba477e4bac161ea5b20ec2919a35f3528e
> Signed-off-by: Yong Zhao <Yong.Zhao at amd.com>

Acked-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 6 +++---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 7 +++++--
>   include/uapi/drm/amdgpu_drm.h              | 2 +-
>   3 files changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index bc2e72a66db9..726c91ab6761 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -224,7 +224,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
>   
>   int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>   				void **mem_obj, uint64_t *gpu_addr,
> -				void **cpu_ptr, bool mqd_gfx9)
> +				void **cpu_ptr, bool cp_mqd_gfx9)
>   {
>   	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
>   	struct amdgpu_bo *bo = NULL;
> @@ -240,8 +240,8 @@ int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>   	bp.type = ttm_bo_type_kernel;
>   	bp.resv = NULL;
>   
> -	if (mqd_gfx9)
> -		bp.flags |= AMDGPU_GEM_CREATE_MQD_GFX9;
> +	if (cp_mqd_gfx9)
> +		bp.flags |= AMDGPU_GEM_CREATE_CP_MQD_GFX9;
>   
>   	r = amdgpu_bo_create(adev, &bp, &bo);
>   	if (r) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index fca87bafe174..665db2353a78 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1043,7 +1043,7 @@ int amdgpu_ttm_gart_bind(struct amdgpu_device *adev,
>   	if (amdgpu_bo_encrypted(abo))
>   		flags |= AMDGPU_PTE_TMZ;
>   
> -	if (abo->flags & AMDGPU_GEM_CREATE_MQD_GFX9) {
> +	if (abo->flags & AMDGPU_GEM_CREATE_CP_MQD_GFX9) {
>   		uint64_t page_idx = 1;
>   
>   		r = amdgpu_gart_bind(adev, gtt->offset, page_idx,
> @@ -1051,7 +1051,10 @@ int amdgpu_ttm_gart_bind(struct amdgpu_device *adev,
>   		if (r)
>   			goto gart_bind_fail;
>   
> -		/* Patch mtype of the second part BO */
> +		/* The memory type of the first page defaults to UC. Now
> +		 * modify the memory type to NC from the second page of
> +		 * the BO onward.
> +		 */
>   		flags &= ~AMDGPU_PTE_MTYPE_VG10_MASK;
>   		flags |= AMDGPU_PTE_MTYPE_VG10(AMDGPU_MTYPE_NC);
>   
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index eaf94a421901..1e59c0146531 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -130,7 +130,7 @@ extern "C" {
>   /* Flag that indicates allocating MQD gart on GFX9, where the mtype
>    * for the second page onward should be set to NC.
>    */
> -#define AMDGPU_GEM_CREATE_MQD_GFX9		(1 << 8)
> +#define AMDGPU_GEM_CREATE_CP_MQD_GFX9		(1 << 8)
>   /* Flag that BO may contain sensitive data that must be wiped before
>    * releasing the memory
>    */



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