[PATCH 2/2] drm/amdgpu: remove mem ecc check for vega20 and arcturus

Guchun Chen guchun.chen at amd.com
Thu Mar 12 02:54:47 UTC 2020


Memory ecc check including HBM and SRAM has been done
in ras init function for vega20 and arcturus. So remove
it from gmc module, only keep this check for vega10.

Suggested-by: Hawking Zhang <Hawking.Zhang at amd.com>
Signed-off-by: Guchun Chen <guchun.chen at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++-----------
 1 file changed, 3 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 90216abf14a4..9bde66a6b432 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -887,28 +887,20 @@ static int gmc_v9_0_late_init(void *handle)
 		return r;
 	/* Check if ecc is available */
 	if (!amdgpu_sriov_vf(adev)) {
-		switch (adev->asic_type) {
-		case CHIP_VEGA10:
-		case CHIP_VEGA20:
-		case CHIP_ARCTURUS:
+		if (adev->asic_type == CHIP_VEGA10) {
 			r = amdgpu_atomfirmware_mem_ecc_supported(adev);
 			if (!r) {
 				DRM_INFO("ECC is not present.\n");
 				if (adev->df.funcs->enable_ecc_force_par_wr_rmw)
 					adev->df.funcs->enable_ecc_force_par_wr_rmw(adev, false);
-			} else {
+			} else
 				DRM_INFO("ECC is active.\n");
-			}
 
 			r = amdgpu_atomfirmware_sram_ecc_supported(adev);
 			if (!r) {
 				DRM_INFO("SRAM ECC is not present.\n");
-			} else {
+			} else
 				DRM_INFO("SRAM ECC is active.\n");
-			}
-			break;
-		default:
-			break;
 		}
 	}
 
-- 
2.17.1



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