[PATCH] drm/amd/pm: correct table_clk_vlt memory size due to replacing one-element array with flexible-array in struct phm_clock_voltage_dependency_table

[Quan, Evan]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Evan Quan <evan.quan at amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Mengbing Wang
Sent: Tuesday, November 10, 2020 3:27 PM
To: amd-gfx at lists.freedesktop.org
Cc: Wang, Mengbing (Martin) <Mengbing.Wang at amd.com>
Subject: [PATCH] drm/amd/pm: correct table_clk_vlt memory size due to replacing one-element array with flexible-array in struct phm_clock_voltage_dependency_table

From: mengbing wang <mengbing.wang at amd.com>


Add 1 to the size passed to kzalloc after replacing one-element array.

There is a regular need in the kernel to provide a way to declare having
a dynamically sized set of trailing elements in a structure. Kernel code
should always use “flexible array members”[1] for these cases. The older
style of one-element or zero-length arrays should no longer be used[2].

Refactor the code according to the use of a flexible-array member in
struct phm_ppt_v1_mm_clock_voltage_dependency_table, instead of a
one-element array, and use the struct_size() helper to calculate the
size for the allocation.

[1] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fen.wikipedia.org%2Fwiki%2FFlexible_array_member&data=04%7C01%7Cevan.quan%40amd.com%7C1a981969976f448053d208d8854a0eac%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637405900847364654%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=3PeO%2FvmQXQAMKOssrW8wnOreIjl8gfeYc0XX2fLCcxk%3D&reserved=0
[2] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.kernel.org%2Fdoc%2Fhtml%2Fv5.9-rc1%2Fprocess%2Fdeprecated.html%23zero-length-and-one-element-arrays&data=04%7C01%7Cevan.quan%40amd.com%7C1a981969976f448053d208d8854a0eac%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637405900847364654%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=6y4YlOPU5z5QrOtprUra%2Fm5EVkNvMnbuKgc5WWk3QuE%3D&reserved=0

Signee-off-by: Mengbing Wang <mengbing.wang at amd.com>
---
 drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
index cf60f3992303..133a08444943 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
@@ -130,9 +130,10 @@ static int smu10_construct_max_power_limits_table(struct pp_hwmgr *hwmgr,
 static int smu10_init_dynamic_state_adjustment_rule_settings(
 struct pp_hwmgr *hwmgr)
 {
+int count = 8;
 struct phm_clock_voltage_dependency_table *table_clk_vlt;

-table_clk_vlt = kzalloc(struct_size(table_clk_vlt, entries, 7),
+table_clk_vlt = kzalloc(struct_size(table_clk_vlt, entries, count),
 GFP_KERNEL);

 if (NULL == table_clk_vlt) {
@@ -140,7 +141,7 @@ static int smu10_init_dynamic_state_adjustment_rule_settings(
 return -ENOMEM;
 }

-table_clk_vlt->count = 8;
+table_clk_vlt->count = count;
 table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_0;
 table_clk_vlt->entries[0].v = 0;
 table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_1;
--
2.17.1

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