[PATCH 15/18] drm/amd/display: enable pipe power gating by default
Rodrigo Siqueira
Rodrigo.Siqueira at amd.com
Fri Nov 20 20:19:55 UTC 2020
From: Sung Joon Kim <sungjoon.kim at amd.com>
[why]
ASIC requirement.
[how]
Make disable_*_power_gate to false.
Signed-off-by: Sung Joon Kim <sungjoon.kim at amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu at amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
index 5f97808bb423..4b029631a22c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
@@ -850,8 +850,8 @@ static const struct dc_debug_options debug_defaults_drv = {
.force_abm_enable = false,
.timing_trace = false,
.clock_trace = true,
- .disable_dpp_power_gate = true,
- .disable_hubp_power_gate = true,
+ .disable_dpp_power_gate = false,
+ .disable_hubp_power_gate = false,
.disable_clock_gate = true,
.disable_pplib_clock_request = true,
.disable_pplib_wm_range = true,
@@ -873,8 +873,8 @@ static const struct dc_debug_options debug_defaults_diags = {
.force_abm_enable = false,
.timing_trace = true,
.clock_trace = true,
- .disable_dpp_power_gate = true,
- .disable_hubp_power_gate = true,
+ .disable_dpp_power_gate = false,
+ .disable_hubp_power_gate = false,
.disable_clock_gate = true,
.disable_pplib_clock_request = true,
.disable_pplib_wm_range = true,
--
2.29.2
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