[PATCH 2/2] drm/amdgpu/display: enable display ip block for vangogh

[Deucher, Alexander]

[AMD Official Use Only - Internal Distribution Only]

Series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
________________________________
From: Huang, Ray <Ray.Huang at amd.com>
Sent: Thursday, October 15, 2020 4:28 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Wentland, Harry <Harry.Wentland at amd.com>; Li, Roman <Roman.Li at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Huang, Ray <Ray.Huang at amd.com>
Subject: [PATCH 2/2] drm/amdgpu/display: enable display ip block for vangogh

This patch is to enable display IP block for vangogh platforms.

Signed-off-by: Huang Rui <ray.huang at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
 drivers/gpu/drm/amd/amdgpu/nv.c            | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a2f0ce854160..15ffb47bd1f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3014,6 +3014,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
         case CHIP_SIENNA_CICHLID:
         case CHIP_NAVY_FLOUNDER:
         case CHIP_DIMGREY_CAVEFISH:
+       case CHIP_VANGOGH:
 #endif
                 return amdgpu_dc != 0;
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 47bd79c9e6ea..217533e2f181 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -621,6 +621,10 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
                 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                         amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+               else if (amdgpu_device_has_dc_support(adev))
+                       amdgpu_device_ip_block_add(adev, &dm_ip_block);
+#endif
                 amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
                 amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
                 amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);
--
2.25.1

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