[PATCH 00/40] Various Polaris fixes and optimizations

[Evan Quan]

The fixes and optimizations include:
- Enable zero rpm fan feature
- Reduce the idle power for multiple displays setup
- Fix screen flicker issue seen on some mutiple displays setup
- Enable mclk switch for multiple synced displays
- Other alignments with Windows

Evan Quan (40):
  drm/amd/pm: correct the checks for polaris kickers
  drm/amd/pm: populate smc vddc table
  drm/amd/pm: populate smc samu table
  drm/amd/pm: correct vddci table setup
  drm/amd/pm: correct sclk table setup
  drm/amd/pm: correct mclk table setup
  drm/amd/pm: correct the ACPI table setup V2
  drm/amd/pm: correct the BootLinkLevel setup
  drm/amd/pm: add pptable VRHotLevel setting
  drm/amd/pm: drop arb table first byte workaround
  drm/amdgpu: correct CG_ACLK_CNTL setting
  drm/amd/pm: add PWR_CKS_CNTL setting
  drm/amd/powerplay: separate Polaris fan table setup from Tonga
  drm/amd/pm: optimize AC timing programming
  drm/amd/pm: drop redundant efuse mask calculations
  drm/amd/pm: correct the settings for ro range minimum and maximum
  drm/amd/pm: correct polaris10 clock stretcher data table setting
  drm/amd/pm: setup zero rpm parameters for polaris10
  drm/amd/pm: add edc leakage controller setting
  drm/amd/pm: add mc register table initialization
  drm/amd/pm: correct VR shared rail info
  drm/amd/pm: correct the checks for sclk/mclk SS support
  drm/amd/pm: correct Polaris powertune table setup
  drm/amd/pm: correct Polaris DIDT configurations
  drm/amd/pm: correct avfs fuse settings
  drm/amd/pm: correct vddc phase control setting
  drm/amd/pm: correct VRconfig setting
  drm/amd/pm: correct platformcaps setup
  drm/amd/pm: correct smc voltage controller setup
  drm/amd/pm: correct sclk/mclk dpm enablement
  drm/amd/pm: correct the way to get the highest vddc
  drm/amd/pm: correct clk/voltage dependence setup
  drm/amd/pm: correct pcie spc cap setup
  drm/amd/pm: correct SMC sclk/mclk boot level setup
  drm/amd/pm: correct vddc_dep_on_dal_pwrl setup
  drm/amd/pm: fulfill the Polaris implementation for
    get_clock_by_type_with_latency()
  drm/amd/pm: enable Polaris watermark table setting
  drm/amd/pm: correct the mclk switching setting
  drm/amd/pm: reconfigure smc on display vbitimeout setting change
  drm/amd/pm: drop redundant display setting

 drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  39 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c       |  34 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c         |  14 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c         |  24 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c  |  11 +-
 drivers/gpu/drm/amd/include/atombios.h        |  20 +-
 drivers/gpu/drm/amd/pm/inc/hwmgr.h            |   1 +
 drivers/gpu/drm/amd/pm/inc/smu74_discrete.h   |   3 +-
 drivers/gpu/drm/amd/pm/inc/smu7_ppsmc.h       |   6 +
 .../gpu/drm/amd/pm/powerplay/hwmgr/hwmgr.c    |  10 +-
 .../drm/amd/pm/powerplay/hwmgr/ppatomctrl.c   | 125 +++-
 .../drm/amd/pm/powerplay/hwmgr/ppatomctrl.h   |  28 +-
 .../drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h |  66 ++
 .../powerplay/hwmgr/process_pptables_v1_0.c   | 107 +++-
 .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c   | 572 ++++++++++++++++--
 .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h   |  20 +
 .../amd/pm/powerplay/hwmgr/smu7_powertune.c   |  34 +-
 .../drm/amd/pm/powerplay/hwmgr/smu7_thermal.c |  11 +
 .../drm/amd/pm/powerplay/hwmgr/smu_helper.c   |  18 +-
 .../drm/amd/pm/powerplay/smumgr/fiji_smumgr.c |   3 +-
 .../pm/powerplay/smumgr/polaris10_smumgr.c    | 356 +++++++----
 .../pm/powerplay/smumgr/polaris10_smumgr.h    |   1 +
 .../amd/pm/powerplay/smumgr/vegam_smumgr.c    |   3 +-
 23 files changed, 1266 insertions(+), 240 deletions(-)

-- 
2.28.0