[PATCH 12/40] drm/amd/pm: add PWR_CKS_CNTL setting
Evan Quan
evan.quan at amd.com
Fri Oct 16 03:26:24 UTC 2020
This is for some special Polaris10 ASICs.
Change-Id: I4d949d32de0f66f4b34c8aaac1b95f7c5288b121
Signed-off-by: Evan Quan <evan.quan at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
---
.../gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 1e8919b0acdb..5a812f170eb0 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -2138,10 +2138,17 @@ static int smu7_patch_voltage_workaround(struct pp_hwmgr *hwmgr)
sub_sys_id = adev->pdev->subsystem_device;
sub_vendor_id = adev->pdev->subsystem_vendor;
- if (hwmgr->chip_id == CHIP_POLARIS10 && hw_revision == 0xC7 &&
- ((sub_sys_id == 0xb37 && sub_vendor_id == 0x1002) ||
- (sub_sys_id == 0x4a8 && sub_vendor_id == 0x1043) ||
- (sub_sys_id == 0x9480 && sub_vendor_id == 0x1682))) {
+ if (adev->pdev->device == 0x67DF && hw_revision == 0xC7 &&
+ ((sub_sys_id == 0xb37 && sub_vendor_id == 0x1002) ||
+ (sub_sys_id == 0x4a8 && sub_vendor_id == 0x1043) ||
+ (sub_sys_id == 0x9480 && sub_vendor_id == 0x1682))) {
+
+ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device,
+ CGS_IND_REG__SMC,
+ PWR_CKS_CNTL,
+ CKS_STRETCH_AMOUNT,
+ 0x3);
+
if (lookup_table->entries[dep_mclk_table->entries[dep_mclk_table->count-1].vddInd].us_vdd >= 1000)
return 0;
--
2.28.0
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