[PATCH 29/40] drm/amd/pm: correct smc voltage controller setup
Evan Quan
evan.quan at amd.com
Fri Oct 16 03:26:41 UTC 2020
Correct Polaris10 smc voltage controller setup.
Change-Id: I819b0b9648074f1af5af6ea285972ec3b3f693d8
Signed-off-by: Evan Quan <evan.quan at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 122b15dc76e1..7ec83a826816 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -237,7 +237,8 @@ static int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
*/
static int smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr)
{
- if (hwmgr->chip_id == CHIP_VEGAM) {
+ if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+ hwmgr->chip_id <= CHIP_VEGAM) {
PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device,
CGS_IND_REG__SMC, PWR_SVI2_PLANE1_LOAD, PSI1, 0);
PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device,
--
2.28.0
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