[PATCH 28/33] drm/amd/display: Add pipe_state tracepoint
Aurabindo Pillai
aurabindo.pillai at amd.com
Wed Oct 21 14:22:52 UTC 2020
From: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
This commit introduces a trace mechanism for struct pipe_ctx by adding a
middle layer struct in the amdgpu_dm_trace.h for capturing the most
important data from struct pipe_ctx and showing its data via tracepoint.
This tracepoint was added to dc.c and dcn10_hw_sequencer, however, it
can be added to other DCN architecture.
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
---
.../amd/display/amdgpu_dm/amdgpu_dm_trace.h | 108 ++++++++++++++++++
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +
drivers/gpu/drm/amd/display/dc/dc_trace.h | 33 ++++++
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 9 +-
4 files changed, 151 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/amd/display/dc/dc_trace.h
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
index 6f07c43ef794..dd7a879c0ec6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
@@ -37,6 +37,8 @@
#include <drm/drm_encoder.h>
#include <drm/drm_atomic.h>
+#include "dc/inc/core_types.h"
+
DECLARE_EVENT_CLASS(amdgpu_dc_reg_template,
TP_PROTO(unsigned long *count, uint32_t reg, uint32_t value),
TP_ARGS(count, reg, value),
@@ -376,6 +378,112 @@ TRACE_EVENT(amdgpu_dm_atomic_check_finish,
__entry->async_update, __entry->allow_modeset)
);
+TRACE_EVENT(amdgpu_dm_dc_pipe_state,
+ TP_PROTO(int pipe_idx, const struct dc_plane_state *plane_state,
+ const struct dc_stream_state *stream,
+ const struct plane_resource *plane_res,
+ int update_flags),
+ TP_ARGS(pipe_idx, plane_state, stream, plane_res, update_flags),
+
+ TP_STRUCT__entry(
+ __field(int, pipe_idx)
+ __field(const void *, stream)
+ __field(int, stream_w)
+ __field(int, stream_h)
+ __field(int, dst_x)
+ __field(int, dst_y)
+ __field(int, dst_w)
+ __field(int, dst_h)
+ __field(int, src_x)
+ __field(int, src_y)
+ __field(int, src_w)
+ __field(int, src_h)
+ __field(int, clip_x)
+ __field(int, clip_y)
+ __field(int, clip_w)
+ __field(int, clip_h)
+ __field(int, recout_x)
+ __field(int, recout_y)
+ __field(int, recout_w)
+ __field(int, recout_h)
+ __field(int, viewport_x)
+ __field(int, viewport_y)
+ __field(int, viewport_w)
+ __field(int, viewport_h)
+ __field(int, flip_immediate)
+ __field(int, surface_pitch)
+ __field(int, format)
+ __field(int, swizzle)
+ __field(unsigned int, update_flags)
+ ),
+
+ TP_fast_assign(
+ __entry->pipe_idx = pipe_idx;
+ __entry->stream = stream;
+ __entry->stream_w = stream->timing.h_addressable;
+ __entry->stream_h = stream->timing.v_addressable;
+ __entry->dst_x = plane_state->dst_rect.x;
+ __entry->dst_y = plane_state->dst_rect.y;
+ __entry->dst_w = plane_state->dst_rect.width;
+ __entry->dst_h = plane_state->dst_rect.height;
+ __entry->src_x = plane_state->src_rect.x;
+ __entry->src_y = plane_state->src_rect.y;
+ __entry->src_w = plane_state->src_rect.width;
+ __entry->src_h = plane_state->src_rect.height;
+ __entry->clip_x = plane_state->clip_rect.x;
+ __entry->clip_y = plane_state->clip_rect.y;
+ __entry->clip_w = plane_state->clip_rect.width;
+ __entry->clip_h = plane_state->clip_rect.height;
+ __entry->recout_x = plane_res->scl_data.recout.x;
+ __entry->recout_y = plane_res->scl_data.recout.y;
+ __entry->recout_w = plane_res->scl_data.recout.width;
+ __entry->recout_h = plane_res->scl_data.recout.height;
+ __entry->viewport_x = plane_res->scl_data.viewport.x;
+ __entry->viewport_y = plane_res->scl_data.viewport.y;
+ __entry->viewport_w = plane_res->scl_data.viewport.width;
+ __entry->viewport_h = plane_res->scl_data.viewport.height;
+ __entry->flip_immediate = plane_state->flip_immediate;
+ __entry->surface_pitch = plane_state->plane_size.surface_pitch;
+ __entry->format = plane_state->format;
+ __entry->swizzle = plane_state->tiling_info.gfx9.swizzle;
+ __entry->update_flags = update_flags;
+ ),
+ TP_printk("pipe_idx=%d stream=%p rct(%d,%d) dst=(%d,%d,%d,%d) "
+ "src=(%d,%d,%d,%d) clip=(%d,%d,%d,%d) recout=(%d,%d,%d,%d) "
+ "viewport=(%d,%d,%d,%d) flip_immediate=%d pitch=%d "
+ "format=%d swizzle=%d update_flags=%x",
+ __entry->pipe_idx,
+ __entry->stream,
+ __entry->stream_w,
+ __entry->stream_h,
+ __entry->dst_x,
+ __entry->dst_y,
+ __entry->dst_w,
+ __entry->dst_h,
+ __entry->src_x,
+ __entry->src_y,
+ __entry->src_w,
+ __entry->src_h,
+ __entry->clip_x,
+ __entry->clip_y,
+ __entry->clip_w,
+ __entry->clip_h,
+ __entry->recout_x,
+ __entry->recout_y,
+ __entry->recout_w,
+ __entry->recout_h,
+ __entry->viewport_x,
+ __entry->viewport_y,
+ __entry->viewport_w,
+ __entry->viewport_h,
+ __entry->flip_immediate,
+ __entry->surface_pitch,
+ __entry->format,
+ __entry->swizzle,
+ __entry->update_flags
+ )
+);
+
#endif /* _AMDGPU_DM_TRACE_H_ */
#undef TRACE_INCLUDE_PATH
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 166dbaa251e9..764cae604203 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -70,6 +70,8 @@
#include "dce/dmub_hw_lock_mgr.h"
+#include "dc_trace.h"
+
#define CTX \
dc->ctx
@@ -2709,6 +2711,8 @@ void dc_commit_updates_for_stream(struct dc *dc,
}
}
+ TRACE_DC_PIPE_STATE(pipe_ctx, i, MAX_PIPES);
+
commit_planes_for_stream(
dc,
srf_updates,
diff --git a/drivers/gpu/drm/amd/display/dc/dc_trace.h b/drivers/gpu/drm/amd/display/dc/dc_trace.h
new file mode 100644
index 000000000000..783256914596
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/dc/dc_trace.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2020 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "amdgpu_dm_trace.h"
+
+#define TRACE_DC_PIPE_STATE(pipe_ctx, index, max_pipes) \
+ for (index = 0; index < max_pipes; ++index) { \
+ struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[index]; \
+ if (pipe_ctx->plane_state) \
+ trace_amdgpu_dm_dc_pipe_state(pipe_ctx->pipe_idx, pipe_ctx->plane_state, \
+ pipe_ctx->stream, &pipe_ctx->plane_res, \
+ pipe_ctx->update_flags.raw); \
+ }
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 08227f0d13f2..8eb88a50af51 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -52,6 +52,7 @@
#include "dpcd_defs.h"
#include "dsc.h"
#include "dce/dmub_hw_lock_mgr.h"
+#include "dc_trace.h"
#define DC_LOGGER_INIT(logger)
@@ -1020,15 +1021,17 @@ static bool dcn10_hw_wa_force_recovery(struct dc *dc)
}
-
void dcn10_verify_allow_pstate_change_high(struct dc *dc)
{
static bool should_log_hw_state; /* prevent hw state log by default */
if (!hubbub1_verify_allow_pstate_change_high(dc->res_pool->hubbub)) {
- if (should_log_hw_state) {
+ int i = 0;
+
+ if (should_log_hw_state)
dcn10_log_hw_state(dc, NULL);
- }
+
+ TRACE_DC_PIPE_STATE(pipe_ctx, i, MAX_PIPES);
BREAK_TO_DEBUGGER();
if (dcn10_hw_wa_force_recovery(dc)) {
/*check again*/
--
2.25.1
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