[PATCH] drm/amd/display: Fixed panic during seamless boot.

[Aurabindo Pillai]

> [AMD Official Use Only - Internal Distribution Only]
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> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>

Thanks for the review.
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> 
> From: Aurabindo Pillai <aurabindo.pillai at amd.com>
> 
> Sent: October 23, 2020 1:09 PM
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> To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
> 
> Cc: Lakha, Bhawanpreet <Bhawanpreet.Lakha at amd.com>; Galiffi, David <
> David.Galiffi at amd.com>
> 
> Subject: [PATCH] drm/amd/display: Fixed panic during seamless boot.
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> From: David Galiffi <David.Galiffi at amd.com>
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> 
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> [why]
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> get_pixel_clk_frequency_100hz is undefined in clock_source_funcs.
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> [how]
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> set function pointer: ".get_pixel_clk_frequency_100hz =
> get_pixel_clk_frequency_100hz"
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> 
> 
> Signed-off-by: David Galiffi <David.Galiffi at amd.com>
> 
> ---
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>  drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 3 ++-
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>  1 file changed, 2 insertions(+), 1 deletion(-)
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> diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
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> index 512b26b3e3fd..589c7fb71480 100644
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> --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
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> +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
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> @@ -1149,7 +1149,8 @@ static uint32_t dcn3_get_pix_clk_dividers(
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>  static const struct clock_source_funcs dcn3_clk_src_funcs = {
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>          .cs_power_down = dce110_clock_source_power_down,
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>          .program_pix_clk = dcn3_program_pix_clk,
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> -       .get_pix_clk_dividers = dcn3_get_pix_clk_dividers
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> +       .get_pix_clk_dividers = dcn3_get_pix_clk_dividers,
> 
> +       .get_pixel_clk_frequency_100hz =
> get_pixel_clk_frequency_100hz
> 
>  };
> 
>  #endif
> 
>  /*****************************************/
> 


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