[PATCH 2/2] drm/amd/pm: correct Renoir UMD Stable Pstate settings
Alex Deucher
alexdeucher at gmail.com
Sat Sep 5 15:44:19 UTC 2020
On Fri, Sep 4, 2020 at 4:15 AM Evan Quan <evan.quan at amd.com> wrote:
>
> Update the UMD stable Pstate settings with correct clocks.
>
> Change-Id: Ia14eb8e23c513cad0bd633fbeb99ed694c7e3f7e
> Signed-off-by: Evan Quan <evan.quan at amd.com>
Series is:
Acked-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> .../gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 52 ++++++++++++++++++-
> .../gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.h | 1 +
> 2 files changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> index f4c55e8b5221..8a0bc7f5ec03 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> @@ -832,9 +832,59 @@ static int renoir_set_performance_level(struct smu_context *smu,
> ret = renoir_force_dpm_limit_value(smu, false);
> break;
> case AMD_DPM_FORCED_LEVEL_AUTO:
> - case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
> ret = renoir_unforce_dpm_levels(smu);
> break;
> + case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetHardMinGfxClk,
> + RENOIR_UMD_PSTATE_GFXCLK,
> + NULL);
> + if (ret)
> + return ret;
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetHardMinFclkByFreq,
> + RENOIR_UMD_PSTATE_FCLK,
> + NULL);
> + if (ret)
> + return ret;
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetHardMinSocclkByFreq,
> + RENOIR_UMD_PSTATE_SOCCLK,
> + NULL);
> + if (ret)
> + return ret;
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetHardMinVcn,
> + RENOIR_UMD_PSTATE_VCNCLK,
> + NULL);
> + if (ret)
> + return ret;
> +
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetSoftMaxGfxClk,
> + RENOIR_UMD_PSTATE_GFXCLK,
> + NULL);
> + if (ret)
> + return ret;
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetSoftMaxFclkByFreq,
> + RENOIR_UMD_PSTATE_FCLK,
> + NULL);
> + if (ret)
> + return ret;
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetSoftMaxSocclkByFreq,
> + RENOIR_UMD_PSTATE_SOCCLK,
> + NULL);
> + if (ret)
> + return ret;
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> + SMU_MSG_SetSoftMaxVcn,
> + RENOIR_UMD_PSTATE_VCNCLK,
> + NULL);
> + if (ret)
> + return ret;
> + break;
> case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK:
> case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK:
> ret = renoir_get_profiling_clk_mask(smu, level,
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.h
> index 8c3f004cdf8d..11c3c22fecbe 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.h
> @@ -29,5 +29,6 @@ extern void renoir_set_ppt_funcs(struct smu_context *smu);
> #define RENOIR_UMD_PSTATE_GFXCLK 700
> #define RENOIR_UMD_PSTATE_SOCCLK 678
> #define RENOIR_UMD_PSTATE_FCLK 800
> +#define RENOIR_UMD_PSTATE_VCNCLK 0x022D01D8
>
> #endif
> --
> 2.28.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
More information about the amd-gfx
mailing list