[PATCH 1/3] drm/amdgpu: Move existing pflip fields into separate struct

[Kazlauskas, Nicholas]

On 2020-09-09 10:28 a.m., Aurabindo Pillai wrote:
> [Why&How]
> To refactor DM IRQ management, all fields used by IRQ is best moved
> to a separate struct so that main amdgpu_crtc struct need not be changed
> Location of the new struct shall be in DM
> 
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>

Regards,
Nicholas Kazlauskas

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h      |  4 ++-
>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>   .../display/amdgpu_dm/amdgpu_dm_irq_params.h  | 33 +++++++++++++++++++
>   3 files changed, 38 insertions(+), 3 deletions(-)
>   create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index aa3e22be4f2d..345cb0464370 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -46,6 +46,7 @@
>   
>   #include <drm/drm_dp_mst_helper.h>
>   #include "modules/inc/mod_freesync.h"
> +#include "amdgpu_dm_irq_params.h"
>   
>   struct amdgpu_bo;
>   struct amdgpu_device;
> @@ -410,7 +411,8 @@ struct amdgpu_crtc {
>   	struct amdgpu_flip_work *pflip_works;
>   	enum amdgpu_flip_status pflip_status;
>   	int deferred_flip_completion;
> -	u32 last_flip_vblank;
> +	/* parameters access from DM IRQ handler */
> +	struct dm_irq_params dm_irq_params;
>   	/* pll sharing */
>   	struct amdgpu_atom_ss ss;
>   	bool ss_enabled;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index cb624ee70545..40814cdd8c92 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -389,7 +389,7 @@ static void dm_pflip_high_irq(void *interrupt_params)
>   	 * of pageflip completion, so last_flip_vblank is the forbidden count
>   	 * for queueing new pageflips if vsync + VRR is enabled.
>   	 */
> -	amdgpu_crtc->last_flip_vblank =
> +	amdgpu_crtc->dm_irq_params.last_flip_vblank =
>   		amdgpu_get_vblank_counter_kms(&amdgpu_crtc->base);
>   
>   	amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE;
> @@ -7248,7 +7248,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
>   			 * on late submission of flips.
>   			 */
>   			spin_lock_irqsave(&pcrtc->dev->event_lock, flags);
> -			last_flip_vblank = acrtc_attach->last_flip_vblank;
> +			last_flip_vblank = acrtc_attach->dm_irq_params.last_flip_vblank;
>   			spin_unlock_irqrestore(&pcrtc->dev->event_lock, flags);
>   		}
>   
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
> new file mode 100644
> index 000000000000..55ef237eed8b
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
> @@ -0,0 +1,33 @@
> +/*
> + * Copyright 2020 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: AMD
> + *
> + */
> +
> +#ifndef __AMDGPU_DM_IRQ_PARAMS_H__
> +#define __AMDGPU_DM_IRQ_PARAMS_H__
> +
> +struct dm_irq_params {
> +	u32 last_flip_vblank;
> +};
> +
> +#endif /* __AMDGPU_DM_IRQ_PARAMS_H__ */
>