[PATCH 3/3] drm/amdgpu: add xgmi perfmons for arcturus
Kasiviswanathan, Harish
Harish.Kasiviswanathan at amd.com
Wed Sep 16 02:09:53 UTC 2020
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan at amd.com>
-----Original Message-----
From: Kim, Jonathan <Jonathan.Kim at amd.com>
Sent: Tuesday, September 15, 2020 6:00 PM
To: amd-gfx at lists.freedesktop.org
Cc: Kasiviswanathan, Harish <Harish.Kasiviswanathan at amd.com>; Kim, Jonathan <Jonathan.Kim at amd.com>; Kim, Jonathan <Jonathan.Kim at amd.com>
Subject: [PATCH 3/3] drm/amdgpu: add xgmi perfmons for arcturus
Add xgmi perfmons for Arcturus.
Signed-off-by: Jonathan Kim <Jonathan.Kim at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c | 55 +++++++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 3 ++
2 files changed, 58 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c
index f3d2ac0e88a7..ec521c72e631 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c
@@ -34,6 +34,8 @@
#define NUM_EVENTS_DF_LEGACY 8
#define NUM_EVENTS_VEGA20_XGMI 2
#define NUM_EVENTS_VEGA20_MAX 2
+#define NUM_EVENTS_ARCTURUS_XGMI 6
+#define NUM_EVENTS_ARCTURUS_MAX 6
/* record to keep track of pmu entry per pmu type per device */ struct amdgpu_pmu_entry { @@ -110,6 +112,27 @@ const struct attribute_group *vega20_attr_groups[] = {
NULL
};
+/* Arcturus events */
+static const char *arcturus_events[NUM_EVENTS_ARCTURUS_MAX][2] = {
+ { "xgmi_link0_data_outbound", "event=0x7,instance=0x4b,umask=0x2" },
+ { "xgmi_link1_data_outbound", "event=0x7,instance=0x4c,umask=0x2" },
+ { "xgmi_link2_data_outbound", "event=0x7,instance=0x4d,umask=0x2" },
+ { "xgmi_link3_data_outbound", "event=0x7,instance=0x4e,umask=0x2" },
+ { "xgmi_link4_data_outbound", "event=0x7,instance=0x4f,umask=0x2" },
+ { "xgmi_link5_data_outbound", "event=0x7,instance=0x50,umask=0x2" } };
+
+static struct attribute_group arcturus_event_attr_group = {
+ .name = "events",
+ .attrs = NULL
+};
+
+const struct attribute_group *arcturus_attr_groups[] = {
+ &amdgpu_pmu_format_attr_group,
+ &arcturus_event_attr_group,
+ NULL
+};
+
/* All df_vega20_* items are DEPRECATED. Use vega20_ items above instead. */ static const char *df_vega20_formats[NUM_FORMATS_DF_LEGACY][2] = {
{ "event", "config:0-7" },
@@ -400,6 +423,16 @@ static int init_pmu_by_type(struct amdgpu_device *adev,
pmu_entry->pmu.attr_groups = vega20_attr_groups;
break;
+ case CHIP_ARCTURUS:
+ amdgpu_pmu_create_attributes(evt_attr_group, evt_attr,
+ arcturus_events, 0, NUM_EVENTS_ARCTURUS_XGMI,
+ PERF_TYPE_AMDGPU_XGMI);
+ num_events += NUM_EVENTS_ARCTURUS_XGMI;
+
+ /* other events can be added here */
+
+ pmu_entry->pmu.attr_groups = arcturus_attr_groups;
+ break;
default:
return -ENODEV;
};
@@ -530,6 +563,28 @@ int amdgpu_pmu_init(struct amdgpu_device *adev)
goto err_pmu;
}
+ break;
+ case CHIP_ARCTURUS:
+ ret = amdgpu_pmu_alloc_pmu_attrs(&amdgpu_pmu_format_attr_group,
+ &fmt_attr,
+ NUM_FORMATS_AMDGPU_PMU,
+ &arcturus_event_attr_group,
+ &evt_attr,
+ NUM_EVENTS_ARCTURUS_MAX);
+
+ if (ret)
+ goto err_alloc;
+
+ ret = init_pmu_by_type(adev,
+ &amdgpu_pmu_format_attr_group, fmt_attr,
+ &arcturus_event_attr_group, evt_attr,
+ "Event", "amdgpu", PERF_TYPE_AMDGPU_MAX);
+
+ if (ret) {
+ kfree(arcturus_event_attr_group.attrs);
+ goto err_pmu;
+ }
+
break;
default:
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
index 6e57ae95f997..6b4b30a8dce5 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
@@ -513,6 +513,7 @@ static int df_v3_6_pmc_start(struct amdgpu_device *adev, uint64_t config,
switch (adev->asic_type) {
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
if (is_add)
return df_v3_6_pmc_add_cntr(adev, config);
@@ -554,6 +555,7 @@ static int df_v3_6_pmc_stop(struct amdgpu_device *adev, uint64_t config,
switch (adev->asic_type) {
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
ret = df_v3_6_pmc_get_ctrl_settings(adev,
config,
counter_idx,
@@ -590,6 +592,7 @@ static void df_v3_6_pmc_get_count(struct amdgpu_device *adev,
switch (adev->asic_type) {
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
df_v3_6_pmc_get_read_settings(adev, config, counter_idx,
&lo_base_addr, &hi_base_addr);
--
2.17.1
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