[PATCH] drm/amd/pm: apply dummy reads workaround for CDR enabled only

Evan Quan evan.quan at amd.com
Fri Sep 18 02:36:13 UTC 2020


For CDR disabled case, the dummy reads workaround is not needed.

Change-Id: I474619b3d82792151870811c289ab311028de211
Signed-off-by: Evan Quan <evan.quan at amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 338a9fdeef6e..5b87690c1e61 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2303,10 +2303,12 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
 		if (umc_fw_greater_than_v136)
 			return 0;
 
-		if (umc_fw_disable_cdr && adev->asic_type == CHIP_NAVI10)
-			return navi10_umc_hybrid_cdr_workaround(smu);
-		else
+		if (umc_fw_disable_cdr) {
+			if (adev->asic_type == CHIP_NAVI10)
+				return navi10_umc_hybrid_cdr_workaround(smu);
+		} else {
 			return navi10_set_dummy_pstates_table_location(smu);
+		}
 	} else {
 		if (adev->asic_type == CHIP_NAVI10)
 			return navi10_umc_hybrid_cdr_workaround(smu);
-- 
2.28.0



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