[PATCH 09/45] drm/amdgpu: use gpu virtual address for interrupt packet write space for vangogh

[Alex Deucher]

From: Huang Rui <ray.huang at amd.com>

The interrupts are not stable while uses guest physical address (GPA)
for interrupt packet write space even on direct loading case.

Signed-off-by: Huang Rui <ray.huang at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index ce4a974ab777..b66414998c90 100644
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
@@ -661,7 +661,10 @@ static int navi10_ih_sw_init(void *handle)
 	/* use gpu virtual address for ih ring
 	 * until ih_checken is programmed to allow
 	 * use bus address for ih ring by psp bl */
-	use_bus_addr =
+	if (adev->flags & AMD_IS_APU)
+		use_bus_addr = false;
+	else
+		use_bus_addr =
 		(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) ? false : true;
 	r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, use_bus_addr);
 	if (r)
-- 
2.25.4