[PATCH 2/4] drm/amd/amdgpu: Prepare implementation to support reporting of CU usage

Alex Deucher alexdeucher at gmail.com
Tue Sep 29 19:57:55 UTC 2020


On Tue, Sep 29, 2020 at 2:00 PM Ramesh Errabolu <Ramesh.Errabolu at amd.com> wrote:
>
> [Why]
> Allow user to know number of compute units (CU) that are in use at any
> given moment.
>
> [How]
> Read registers of SQ that give number of waves that are in flight
> of various queues. Use this information to determine number of CU's
> in use.
>
> Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +++--
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h | 3 +++
>  2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 346d8288f6ab..6959aebae6d4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -49,6 +49,7 @@
>  #include "amdgpu_ras.h"
>
>  #include "gfx_v9_4.h"
> +#include "gfx_v9_0.h"
>
>  #include "asic_reg/pwr/pwr_10_0_offset.h"
>  #include "asic_reg/pwr/pwr_10_0_sh_mask.h"
> @@ -788,7 +789,6 @@ static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev);
>  static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
>                                   struct amdgpu_cu_info *cu_info);
>  static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev);
> -static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance);
>  static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring);
>  static u64 gfx_v9_0_ring_get_rptr_compute(struct amdgpu_ring *ring);
>  static int gfx_v9_0_query_ras_error_count(struct amdgpu_device *adev,
> @@ -2397,7 +2397,8 @@ static void gfx_v9_0_tiling_mode_table_init(struct amdgpu_device *adev)
>         /* TODO */
>  }
>
> -static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance)
> +void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num,
> +                          u32 instance)
>  {
>         u32 data;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h
> index 407472031daa..dfe8d4841f58 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h
> @@ -26,4 +26,7 @@
>
>  extern const struct amdgpu_ip_block_version gfx_v9_0_ip_block;
>
> +void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num,
> +                          u32 instance);
> +
>  #endif
> --
> 2.27.0
>
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