[PATCH] drm/amdgpu: fix gfx9 rlc modprobe rlcg program timeout issue
Changfeng
Changfeng.Zhu at amd.com
Tue Apr 6 07:29:48 UTC 2021
From: changzhu <Changfeng.Zhu at amd.com>
From: Changfeng <Changfeng.Zhu at amd.com>
It needs to add amdgpu_sriov_fullaccess judgement as gfx_v10_rlcg_wreg
when doing gfx_v9_0_rlcg_wreg.
Or it will cause modprobe issue as below:
kernel: [ 59.992843] amdgpu: timeout: rlcg program reg:0x02984 failed!
Fix for patch:
drm/amdgpu: indirect register access for nv12 sriov
Change-Id: I971804e4e8dbd83e4179beefa8ae8a06bd52913b
Signed-off-by: Changfeng <Changfeng.Zhu at amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 2111e4c46a52..06811a1f4625 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -734,7 +734,7 @@ static const u32 GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS[] =
mmRLC_SRM_INDEX_CNTL_DATA_7 - mmRLC_SRM_INDEX_CNTL_DATA_0,
};
-void gfx_v9_0_rlcg_wreg(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag)
+static void gfx_v9_0_rlcg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag)
{
static void *scratch_reg0;
static void *scratch_reg1;
@@ -787,6 +787,20 @@ void gfx_v9_0_rlcg_wreg(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag)
}
+static void gfx_v9_0_rlcg_wreg(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag)
+{
+ if (amdgpu_sriov_fullaccess(adev)) {
+ gfx_v9_0_rlcg_rw(adev, offset, v, flag);
+
+ return;
+ }
+
+ if (flag & AMDGPU_REGS_NO_KIQ)
+ WREG32_NO_KIQ(offset, v);
+ else
+ WREG32(offset, v);
+}
+
#define VEGA10_GB_ADDR_CONFIG_GOLDEN 0x2a114042
#define VEGA12_GB_ADDR_CONFIG_GOLDEN 0x24104041
#define RAVEN_GB_ADDR_CONFIG_GOLDEN 0x24000042
--
2.17.1
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