[PATCH] drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flag

[Shih, Jude]

[AMD Official Use Only - Internal Distribution Only]

Hi Nicholas,

Does this completion need to be on the amdgpu device itself?

I would prefer if we keep this as needed within DM itself if possible.

=> do you mean move it to amdgpu_display_manager in amdgpu_dm.h as global variable?

My problem with still leaving this as DC_ENABLE_DMUB_AUX is we shouldn't require the user to have to flip this on by default later. I think I'd prefer this still as a DISABLE option if we want to leave it for users to debug any potential issues.
=> do you mean DC_ENABLE_DMUB_AUX = 0x10 => DC_DISABLE_DMUB_AUX = 0x10
and amdgpu_dc_debug_mask = 0x10 as default to turn it off?

Thanks,

Best Regards,

Jude

-----Original Message-----
From: Kazlauskas, Nicholas <Nicholas.Kazlauskas at amd.com> 
Sent: Tuesday, April 6, 2021 10:04 PM
To: Shih, Jude <Jude.Shih at amd.com>; amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Lin, Wayne <Wayne.Lin at amd.com>; Hung, Cruise <Cruise.Hung at amd.com>
Subject: Re: [PATCH] drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flag

On 2021-04-06 9:40 a.m., Jude Shih wrote:
> [Why & How]
> We use outbox interrupt that allows us to do the AUX via DMUB 
> Therefore, we need to add some irq source related definition in the 
> header files; Also, I added debug flag that allows us to turn it 
> on/off for testing purpose.
> 
> Signed-off-by: Jude Shih <shenshih at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h                       | 2 ++
>   drivers/gpu/drm/amd/include/amd_shared.h                  | 3 ++-
>   drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h | 2 ++
>   3 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 963ecfd84347..7e64fc5e0dcd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -923,6 +923,7 @@ struct amdgpu_device {
>   	struct amdgpu_irq_src		pageflip_irq;
>   	struct amdgpu_irq_src		hpd_irq;
>   	struct amdgpu_irq_src		dmub_trace_irq;
> +	struct amdgpu_irq_src		dmub_outbox_irq;
>   
>   	/* rings */
>   	u64				fence_context;
> @@ -1077,6 +1078,7 @@ struct amdgpu_device {
>   
>   	bool                            in_pci_err_recovery;
>   	struct pci_saved_state          *pci_state;
> +	struct completion dmub_aux_transfer_done;

Does this completion need to be on the amdgpu device itself?

I would prefer if we keep this as needed within DM itself if possible.

>   };
>   
>   static inline struct amdgpu_device *drm_to_adev(struct drm_device 
> *ddev) diff --git a/drivers/gpu/drm/amd/include/amd_shared.h 
> b/drivers/gpu/drm/amd/include/amd_shared.h
> index 43ed6291b2b8..097672cc78a1 100644
> --- a/drivers/gpu/drm/amd/include/amd_shared.h
> +++ b/drivers/gpu/drm/amd/include/amd_shared.h
> @@ -227,7 +227,8 @@ enum DC_DEBUG_MASK {
>   	DC_DISABLE_PIPE_SPLIT = 0x1,
>   	DC_DISABLE_STUTTER = 0x2,
>   	DC_DISABLE_DSC = 0x4,
> -	DC_DISABLE_CLOCK_GATING = 0x8
> +	DC_DISABLE_CLOCK_GATING = 0x8,
> +	DC_ENABLE_DMUB_AUX = 0x10,

My problem with still leaving this as DC_ENABLE_DMUB_AUX is we shouldn't require the user to have to flip this on by default later. I think I'd prefer this still as a DISABLE option if we want to leave it for users to debug any potential issues.

If there's no value in having end users debug issues by setting this bit then we should keep it as a dc->debug default in DCN resource.

Regards,
Nicholas Kazlauskas

>   };
>   
>   enum amd_dpm_forced_level;
> diff --git a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h 
> b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
> index e2bffcae273a..754170a86ea4 100644
> --- a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
> +++ b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
> @@ -1132,5 +1132,7 @@
>   
>   #define DCN_1_0__SRCID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT       0x68
>   #define DCN_1_0__CTXID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT       6
> +#define DCN_1_0__SRCID__DMCUB_OUTBOX_LOW_PRIORITY_READY_INT        0x68 // DMCUB_IHC_outbox1_ready_int IHC_DMCUB_outbox1_ready_int_ack DMCUB_OUTBOX_LOW_PRIORITY_READY_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE24 Level/Pulse
> +#define DCN_1_0__CTXID__DMCUB_OUTBOX_LOW_PRIORITY_READY_INT        8
>   
>   #endif // __IRQSRCS_DCN_1_0_H__
>