[PATCH 05/16] drm/amd/display: Fix DML validation of simple vs native 422 modes
Bindu Ramamurthy
bindu.r at amd.com
Sat Apr 10 02:03:50 UTC 2021
From: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
[Why]
We're always validating DML with simple 422 DSC even if native 422 DSC
is in use.
[How]
Use the mode configuration from the timing.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
Acked-by: Bindu Ramamurthy <bindur12 at amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index f65a6904d09c..527e56c353cb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -2201,10 +2201,11 @@ int dcn20_populate_dml_pipes_from_context(
pipes[pipe_cnt].dout.output_bpp = (output_bpc * 3.0) / 2;
break;
case PIXEL_ENCODING_YCBCR422:
- if (true) /* todo */
- pipes[pipe_cnt].dout.output_format = dm_s422;
- else
+ if (res_ctx->pipe_ctx[i].stream->timing.flags.DSC &&
+ !res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.ycbcr422_simple)
pipes[pipe_cnt].dout.output_format = dm_n422;
+ else
+ pipes[pipe_cnt].dout.output_format = dm_s422;
pipes[pipe_cnt].dout.output_bpp = output_bpc * 2;
break;
default:
--
2.25.1
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