[PATCH 00/16] DC Patches April 23, 2021

Wheeler, Daniel Daniel.Wheeler at amd.com
Fri Apr 23 19:36:53 UTC 2021


[AMD Public Use]

Hi all,
 
This week this patchset was tested on the following systems:

HP Envy 360, with Ryzen 5 4500U, on the following display types: 
eDP 1080p 60hz, 4k 60hz  (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
 
Sapphire Pulse RX5700XT on the following display types:
4k 60hz  (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
 
Reference AMD RX6800 on the following display types:
4k 60hz  (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
 
Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz on all systems.
 
Tested-by: Daniel Wheeler <daniel.wheeler at amd.com>

 
Thank you,
 
Dan Wheeler
Technologist  |  AMD
SW Display------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
Facebook |  Twitter |  amd.com  


-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Wayne Lin
Sent: April 22, 2021 10:37 PM
To: amd-gfx at lists.freedesktop.org
Cc: Brol, Eryk <Eryk.Brol at amd.com>; Li, Sun peng (Leo) <Sunpeng.Li at amd.com>; Wentland, Harry <Harry.Wentland at amd.com>; Zhuo, Qingqing <Qingqing.Zhuo at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>; Jacob, Anson <Anson.Jacob at amd.com>; Pillai, Aurabindo <Aurabindo.Pillai at amd.com>; Lin, Wayne <Wayne.Lin at amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha at amd.com>; R, Bindu <Bindu.R at amd.com>
Subject: [PATCH 00/16] DC Patches April 23, 2021

This DC patchset brings along following fixes:

* [FW Promotion] Release 0.0.63
* fix HDCP reset sequence on reinitialize
* Fix BSOD with NULL check
* Added multi instance support for ABM
* Revert wait vblank on update dpp clock
* skip program clock when allow seamless boot
* Add new DP_SEC registers for programming SDP Line number
* Add SE_DCN3_REG_LIST for control SDP num
* Add new case to get spread spectrum info
* fix wrong statement in mst hpd debugfs
* Clear MASTER_UPDATE_LOCK_DB_EN when disable doublebuffer lock
* Expose internal display flag via debugfs
* take max dsc stream bandwidth overhead into account
* ddc resource data need to be initialized
* avoid to authentication when DEVICE_COUNT=0

 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  22 +++-
 .../drm/amd/display/dc/bios/bios_parser2.c    |   2 +
 .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c |  10 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c      |  15 +--
 drivers/gpu/drm/amd/display/dc/core/dc_link.c |  22 +++-
 drivers/gpu/drm/amd/display/dc/dc.h           |   3 +-
 drivers/gpu/drm/amd/display/dc/dc_dsc.h       |   5 +-
 drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c |  30 +++++
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |   2 +-
 .../drm/amd/display/dc/dcn21/dcn21_hwseq.c    |   2 +-
 .../dc/dcn30/dcn30_dio_stream_encoder.h       |   4 +
 .../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c |   2 +-
 .../drm/amd/display/dc/dcn30/dcn30_resource.c |   2 +-
 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c   | 113 ++++++++++++++----
 drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c  |  43 -------
 drivers/gpu/drm/amd/display/dc/dsc/rc_calc.h  |   2 -
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |  88 ++++++++++++--
 .../gpu/drm/amd/display/modules/hdcp/hdcp.c   |   1 -
 .../display/modules/hdcp/hdcp1_execution.c    |   5 +
 .../display/modules/hdcp/hdcp2_execution.c    |   5 +
 20 files changed, 260 insertions(+), 118 deletions(-)

-- 
2.17.1

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