[PATCH] drm/amdgpu: enable more pm sysfs under SRIOV 1-VF mode

[Deng, Emily]

Acked-by: Emily.Deng <Emily.Deng at amd.com>

>-----Original Message-----
>From: Gu, JiaWei (Will) <JiaWei.Gu at amd.com>
>Sent: Thursday, August 5, 2021 2:32 PM
>To: amd-gfx at lists.freedesktop.org
>Cc: Nieto, David M <David.Nieto at amd.com>; Deng, Emily
><Emily.Deng at amd.com>; Deucher, Alexander
><Alexander.Deucher at amd.com>
>Subject: RE: [PATCH] drm/amdgpu: enable more pm sysfs under SRIOV 1-VF
>mode
>
>[AMD Official Use Only]
>
>Ping.
>
>-----Original Message-----
>From: Gu, JiaWei (Will) <JiaWei.Gu at amd.com>
>Sent: Wednesday, August 4, 2021 4:08 PM
>To: Gu, JiaWei (Will) <JiaWei.Gu at amd.com>; amd-gfx at lists.freedesktop.org
>Cc: Nieto, David M <David.Nieto at amd.com>; Deng, Emily
><Emily.Deng at amd.com>; Deucher, Alexander
><Alexander.Deucher at amd.com>
>Subject: RE: [PATCH] drm/amdgpu: enable more pm sysfs under SRIOV 1-VF
>mode
>
>[AMD Official Use Only]
>
>Add Alex.
>
>-----Original Message-----
>From: Jiawei Gu <Jiawei.Gu at amd.com>
>Sent: Wednesday, August 4, 2021 3:50 PM
>To: amd-gfx at lists.freedesktop.org
>Cc: Nieto, David M <David.Nieto at amd.com>; Deng, Emily
><Emily.Deng at amd.com>; Gu, JiaWei (Will) <JiaWei.Gu at amd.com>
>Subject: [PATCH] drm/amdgpu: enable more pm sysfs under SRIOV 1-VF
>mode
>
>Enable pp_num_states, pp_cur_state, pp_force_state, pp_table sysfs under
>SRIOV 1-VF scenario.
>
>Signed-off-by: Jiawei Gu <Jiawei.Gu at amd.com>
>---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
>b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
>index 769f58d5ae1a..04c7d82f8b89 100644
>--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
>+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
>@@ -2005,10 +2005,10 @@ static int ss_bias_attr_update(struct
>amdgpu_device *adev, struct amdgpu_device_  static struct
>amdgpu_device_attr amdgpu_device_attrs[] = {
> 	AMDGPU_DEVICE_ATTR_RW(power_dpm_state,
>		ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
> 	AMDGPU_DEVICE_ATTR_RW(power_dpm_force_performance_level,
>	ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
>-	AMDGPU_DEVICE_ATTR_RO(pp_num_states,
>	ATTR_FLAG_BASIC),
>-	AMDGPU_DEVICE_ATTR_RO(pp_cur_state,
>	ATTR_FLAG_BASIC),
>-	AMDGPU_DEVICE_ATTR_RW(pp_force_state,
>	ATTR_FLAG_BASIC),
>-	AMDGPU_DEVICE_ATTR_RW(pp_table,
>		ATTR_FLAG_BASIC),
>+	AMDGPU_DEVICE_ATTR_RO(pp_num_states,
>	ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
>+	AMDGPU_DEVICE_ATTR_RO(pp_cur_state,
>	ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
>+	AMDGPU_DEVICE_ATTR_RW(pp_force_state,
>	ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
>+	AMDGPU_DEVICE_ATTR_RW(pp_table,
>		ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
> 	AMDGPU_DEVICE_ATTR_RW(pp_dpm_sclk,
>	ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
> 	AMDGPU_DEVICE_ATTR_RW(pp_dpm_mclk,
>	ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
> 	AMDGPU_DEVICE_ATTR_RW(pp_dpm_socclk,
>	ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
>--
>2.17.1